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spi/i 2 c compatible, temperature sensor, 4-channel adc and quad voltage output dac adt7516/adt7517/adt7519 rev . a in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features adt75 16fou r 12-bit dacs adt75 17fou r 10-bit dacs adt75 19fou r 8-bit d a cs buffered volta g e output guarantee d m o notonic by de sign over all codes 10-bit tempera t ure-to-digita l converter 10-bit 4-chann e l a d c dc input ban d width input range: 0 v to 2.28 v temperature r a nge: C40c to +120 c temperature s e nsor accu racy of typ: 0.5c supply range: 2.7 v to 5.5 v dac o u tp ut ra nge: 0 v to 2 v re f power-down current: 1 a internal 2.28 v re f option do uble-buffer e d input lo gic buffered r e fere nce input po wer-o n reset to 0 v dac o u t p ut simultaneo us update o f o u tp uts ( ldac function) on-chip rail-to-rail output buff er amplifier spi ? , i 2 c ? , qspi?, microwire?, and dsp co mpatible 4-wire seri al in terface smbus packet error checking (pec) compatible 16-lea d qsop package applic ati o ns portable batter y -powered inst ruments personal computers smart battery c h argers telecommunications systems electronic text equipment domestic appliances process control pin c o n f ig uratio n adt7516/ adt7517/ adt7519 top view (not to scale) v out -b 1 v out -c 16 v out -a 2 v out -d 15 v ref -in 3 ain4 14 cs 4 scl/sclk 13 gnd 5 sda/din 12 v dd 6 dout/add 11 d+/ain1 7 int/int 10 d?/ain2 8 ldac/ain3 9 02883-a - 006 fi g u r e 1 . general description the ad t7516 /adt7517/ad t7519 1 co m b in e a 10-b i t t e m p - era t ur e- t o -d ig i t a l co n v er t e r , a 1 0 -b i t 4-chan n e l ad c, and a q u ad 12 -/10 -/8-b i t d a c, r e s p ec ti v e l y , in a 16-le ad qso p p a cka g e . the p a r t s als o in cl ude a b a n d g a p t e m p era t ur e s e n s o r a nd a 10 -b i t ad c to m o ni to r and dig i t i ze t h e te m p er a t ur e r e adin g t o a r e s o l u tio n o f 0.25c. the ad t7516 /adt7517/ adt7519 o p er a t e f r o m a sin g le 2.7 v t o 5.5 v s u p p l y . the i n p u t v o l t ag e ra n g e o n t h e ad c chann e ls i s 0 v t o 2.28 v , a nd the in p u t b a nd wid t h is dc. the r e f e r e n c e f o r t h e ad c ch a n nels is der i ve d i n ter n a l ly . th e o u tp u t vol t a g e o f t h e d a c ra n g es f r o m 0 v t o v dd , w i t h a n ou tpu t v o lt a g e s e tt l i n g time o f 7 m s ty p i cal . the ad t7516 /adt7517/ad t7519 p r o v ide two s e r i al in ter f ace o p tio n s: a 4-wir e s e r i al in t e r f ac e tha t is com p a t i b le wi th s p i, qs pi, mi cro w ire, an d ds p in t e r f ace st and a r d s, a nd a 2- w i r e sm b u s / i 2 c i n t e r f ace. the y fe a t ur e a st and b y mo de t h a t is c o n t ro l l e d t h rou g h t h e s e r i a l i n te r f a c e. the r e fer e n c e fo r t h e fo ur d a cs is der i v e d e i t h er in t e r n al l y o r f r om a re f e re nc e pi n . t h e output s of a l l d a c s m a y b e up d a te d s i m u lt a n e o u sly u s i n g t h e s o f t w a re l d a c f u nc t i on or t h e ext e r n al ld a c p i n. th e adt7516/ad t7517/adt7 519 i n c o r p or ate a p o we r - on re s e t c i rc u i t , w h i c h e n s u re s t h a t t h e d a c o u t p u t p o w e rs u p to 0 v a nd r e ma in s t h ere un t i l a va lid wr i t e t a k e s plac e . the ad t7516 /adt7517/ad t7519 s wide su p p l y v o l t a g e ra n g e , l o w su p p ly c u r r e n t, and s p i / i 2 c co m p a t i b l e i n t e rfa c e m a k e th em i d eal f o r a v a ri e t y o f a p p l ica t i o n s , in c l ud in g pe r s o n al co m p ut ers, o f f i ce e q ui pmen t, a nd dom e s t ic a p pl ian c es. 1 pr otected by the following u.s. patent numbers: 6,169,4 42; 5,867,012; 5,764174. other patents pending.
adt7516/adt7517/adt7519 rev. a | page 2 of 44 table of contents specifications ..................................................................................... 3 dac ac characteristics .............................................................. 6 functional block diagram .............................................................. 8 absolute maximum ratings ............................................................ 9 esd caution .................................................................................. 9 pin configuration and functional descriptions ........................ 10 te r m i no l o g y .................................................................................... 11 typical performance characteristics ........................................... 13 theory of operation ...................................................................... 19 power-up calibration ................................................................ 19 conversion speed ....................................................................... 19 function descriptionvoltage output .................................. 20 functional descriptionanalog inputs ................................. 23 adc transfer function ............................................................. 23 functional descriptionmeasurement .................................. 25 adt7516/adt7517/adt7519 registers ............................... 28 serial interface ............................................................................ 37 smbus alert response ............................................................... 43 outline dimensions ....................................................................... 44 ordering guide .......................................................................... 44 revision history 8/04data sheet changed from rev. 0 to rev. a updated format...................................................................... universal deleted adt7518 added adt7519..................................................................... universal change to internal v ref value..............................................................5 change to equation.............................................................................26 7/03initial version: rev. 0
adt7516/adt7517/adt7519 rev. a | page 3 of 44 specifications table 1. temperature range is as fo llows: a version: C40c to +120c. v dd = 2.7 v to 5.5 v, gnd = 0 v, ref in = 2.25 v, unless otherwise noted. parameter 1 min typ max unit conditions/comments dac dc performance 2 , 3 adt7519 resolution 8 bits relative accuracy 0.15 1 lsb differential nonlinearity 0.02 0.25 lsb guaranteed monotonic over all codes. adt7517 resolution 10 bits relative accuracy 0.5 4 lsb differential nonlinearity 0.05 0.5 lsb guaranteed monotonic over all codes. adt7516 resolution 12 bits relative accuracy 2 16 lsb differential nonlinearity 0.02 0.9 lsb guaranteed monotonic over all codes. offset error 0.4 2 % of fsr gain error 0.3 2 % of fsr lower deadband 20 65 mv lower deadband exists on ly if offset error is negative. see figure 8. upper deadband 60 100 mv upper deadband exists if v ref = v dd and off-set plus gain error is positive. see figure 9. offset error drift 4 C12 ppm of fsr/c gain error drift 4 C5 ppm of fsr/c dc power supply rejection ratio 4 C60 db ?v dd = 10%. dc crosstalk 4 200 v see figure 5. adc dc accuracy max v dd = 5 v. resolution 10 bits total unadjusted error (tue) 2 3 % of fsr offset error 0.5 % of fsr gain error 2 % of fsr adc bandwidth dc hz analog inputs input voltage range 0 2.28 v ain1 to ain4. c4 = 0 in control configuration 3. 0 v dd v ain1 to ain4. c4 = 0 in control configuration 3. dc leakage current 1 a input capacitance 5 20 pf input resistance 10 m? thermal characteristics internal temperature sensor internal reference used. averaging on. accuracy @ v dd = 3.3 v 10% 1.5 c t a = 85c. 0.5 3 c t a = 0c to +85c. 2 5 c t a = C40c to +120c. accuracy @ v dd = 5 v 5% 2 3 c t a = 0c to +85c. 3 5 c t a = C40c to +120c. resolution 10 bits equivalent to 0.25c. long-term drift 0.25 c drift over 10 years if part is operated at 55c.
adt7516/adt7517/adt7519 rev. a | page 4 of 44 parameter 1 min typ max unit conditions/comments thermal characteristics external temperature sensor external transistor = 2n3906. accuracy @ v dd = 3.3 v 10% 1.5 c t a = 85c. 3 c t a = 0c +85c. 5 c t a = C40c to +120c. accuracy @ v dd = 5 v 5% 2 3 c t a = 0c +85c. 3 5 c t a = C40c to +120c. resolution 10 bits equivalent to 0.25c. output source current 180 a high level. 11 a low level. thermal voltage output 8-bit dac output resolution 1 c scale factor 8.97 mv/c 0 v to v ref output. t a = C40c to +120c. 17.58 mv/c 0 v to 2 v ref output. t a = C40c to +120c. 10-bit dac output resolution 0.25 c scale factor 2.2 mv/c 0 v to v ref output. t a = C40c to +120c. 4.39 mv/c 0 v to 2 v ref output. t a = C40c to +120c. conversion times single channel mode. slow adc v dd /ain 11.4 ms averaging (16 samples) on. 712 s averaging off. internal temperature 11.4 ms averaging (16 samples) on. 712 s averaging off. external temperature 24.22 ms averaging (16 samples) on. 1.51 ms averaging off. fast adc v dd /ain 712 s averaging (16 samples) on. 44.5 s averaging off. internal temperature 2.14 ms averaging (16 samples) on. 134 s averaging off. external temperature 14.25 ms averaging (16 samples) on. 890 s averaging off. round robin update rate 5 slow adc @ 25c time to complete one measurement cycle through all channels. averaging on 79.8 ms ain1 and ain2 are selected on pins 7 and 8. averaging off 4.99 ms ain1 and ain2 are selected on pins 7 and 8. averaging on 94.76 ms d+ and dC are selected on pins 7 and 8. averaging off 9.26 ms d+ and d-C are selected on pins 7 and 8. fast adc @ 25c averaging on 6.41 ms ain1 and ain2 are selected on pins 7 and 8. averaging off 400.84 s ain1 and ain2 are selected on pins 7 and 8. averaging on 21.77 ms d+ and dC are selected on pins 7 and 8. averaging off 3.07 ms d+ and dC are selected on pins 7 and 8. dac external reference input 4 v ref input range 1 v dd v buffered reference. v ref input impedance >10 m? buffe red reference and power-down mode. reference feedthrough C90 db frequency = 10 khz. channel-to-channel isolation C75 db frequency = 10 khz.
adt7516/adt7517/adt7519 rev. a | page 5 of 44 parameter 1 min typ max unit conditions/comments on-chip reference reference voltage 4 2.28 v temperature coefficient 4 80 ppm/c output characteristics 4 output voltage 6 0.001 v dd ? 0.1 v this is a measure of the minimum and maximum drive capability of the output amplifier. dc output impedance 0.5 ? short circuit current 25 ma v dd = 5 v. 16 ma v dd = 3 v. power-up time 2.5 s coming out of power-down mode. v dd = 5 v. 5 s coming out of power-down mode. v dd = 3.3 v. digital inputs 4 input current 1 a v in = 0 v to v dd. v il , input low voltage 0.8 v v ih , input high voltage 1.89 v pin capacitance 3 10 pf all digital inputs. scl, sda glitch rejection 50 ns input filtering suppresses noise spikes of less than 50 ns. ldac pulse width 20 ns edge triggered input. digital output digital high voltage, v oh 2.4 v i source = i sink = 200 a. output low voltage, v ol 0.4 v i ol = 3 ma. output high current, i oh 1 ma v oh = 5 v. output capacitance, c out 50 pf int/ int output saturation voltage 0.8 v i out = 4 ma. i 2 c timing characteristics 7 , 8 serial clock period, t 1 2.5 s fast mode i 2 c. see figure 2. data in setup time to scl high, t 2 50 ns data out stable after scl low, t 3 0 ns see figure 2. sda low setup time to scl low (start condition), t 4 50 ns see figure 2. sda high hold time after scl high (stop condition), t 5 50 ns see figure 2. sda and scl fall time, t 6 90 ns see figure 2. spi timing characteristics 4 , 9 cs to sclk setup time, t 1 0 ns see figure 3. sclk high pulse width, t 2 50 ns see figure 3. sclk low pulse width, t 3 50 ns see figure 3. data access time after sclk falling edge, t 4 , 10 35 ns data setup time prior to sclk rising edge, t 5 20 ns see figure 3. data hold time after sclk rising edge, t 6 0 ns see figure 3. cs to sclk hold time, t 7 0 s see figure 3. cs to dout high impedance, t 8 40 ns see figure 3.
adt7516/adt7517/adt7519 r e v. a | pa ge 6 o f 4 4 parameter 1 min typ max unit conditions/comments power requir emen ts v dd 2 . 7 5 . 5 v v dd settling tim e 50 ms v dd settles to within 10% of its final vo ltage leve l . i dd (normal mode) 11 3 m a v dd = 3.3 v, v ih = v dd , and v il = gnd. 2 . 2 3 m a v dd = 5 v, v ih = v dd , and v il = gn d. i dd (pow er-down mode) 10 a v dd = 3.3 v, v ih = v dd , and v il = gnd. 1 0 a v dd = 5 v, v ih = v dd , and v il = gn d. power dissi pati o n 1 0 m w v dd = 3.3 v. nor m al mode. 3 3 w v dd = 3.3 v. shutdown mode. 1 se e t h e s e ct ion . t e rmin olo g y 2 dc s p e c if icatio ns a r e tes t e d with the outputs unl o ade d . 3 linearity is tested using a reduce d c o de range: adt7516 (code 115 to 4095); ad t7517 (code 28 to 1023); adt7519 (code 8 to 255) . 4 guarante e d by d e sign and characte riz a tio n , no t pro d uctio n te s t ed . 5 ro und ro bin is the co ntinuo u s se que ntial me as ure me nt of the f o l l o wing cha nne l s : v dd , internal temperature, ex ternal temperature ( a i n1, a i n2) , a i n3, and a i n4. 6 for t h e a m p li fi er o u t p ut t o rea c h i t s m i n i m u m volt a g e, t h e o f f s et error m u st be n e ga t i ve. fo r t h e a m p li fi er out p ut t o rea c h i t s maximum vol t age ( v re f = v dd ), t h e of fs et plus gain error mu st be positive. 7 the sd a and sc l timing is meas ured with the inpu t f i l t ers turned on to meet the f a s t-mod e i 2 c s p ecif ication. switching of f the in put fi lt ers i m p roves t h e t r a n sfer ra t e but has a ne gative e f fe ct o n the em c be havio r o f the part. 8 guarante e d by d e sign, no t pro d uctio n te s t ed . 9 a l l i n put si gn a ls a r e sp eci f i e d wi t h t r = t f = 5 n s (10% t o 90% of v dd ), a n d t i m e d from a volt a g e lev e l o f 1.6 v. 10 mea s ure d with the loa d circuit shown in figure 4. 11 the i dd speci f i c a t i o n i s va li d f o r a l l d a c co de s a n d fu ll- sc a l e a n a l og i n put vo lt a g es. in t e rfa c e i n a c t i ve. al l d a c s a n d ad cs a c t i ve. l oad c urrents e x clu d e d . dac ac c h a r acteristics table 2. v dd = 2.7 v to 5.5 v, r l = 4.7 k? to gnd; c l = 2 0 0 p f to g n d ; 4. 7 k ? to v dd ; all sp ecification s t min to t max , un less ot herwi s e not e d. parameter 1 , 2 min typ 3 max unit conditions/comments output voltage settling time v ref = v dd = 5 v. adt7519 6 8 s 1/4 scale to 3/4 scale change (4 0h to c0h). adt7517 7 9 s 1/4 scale to 3/4 scale change (1 00h to 300h). adt7516 8 10 s 1/4 scale to 3/4 scale change (4 00h to c00h). slew rate 0.7 v/s major-code change glitch energy 12 nv -s 1 lsb change ar ound major carr y. digital feedthrough 0.5 nv-s digital crossta l k 1 nv-s analog cros stal k 0.5 nv-s dac-to-dac cr osstalk 3 nv-s multiplying bandwidth 200 khz v ref = 2 v 0.1 v p-p. t o tal harmonic distortion C70 db v ref = 2.5 v 0.1 v p-p. frequency = 10 khz. 1 se e s e ct ion . t e rmin ology 2 guarante e d by d e sign and characte riz a tio n , no t pro d uctio n te s t ed . 3 @ 25c. scl t 4 t 2 t 1 t 3 t 5 t 6 sda data in sda data ou t 02883-a - 002 fi g u r e 2 . i 2 c b u s ti ming d i ag r a m
adt7516/adt7517/adt7519 r e v. a | pa ge 7 o f 4 4 t 1 t 2 t 3 t 5 t 6 t 4 t 7 t 8 d7 cs sclk din dout d6 d5 d4 d3 d2 d1 d0 x x x x x x x x x x x x xxxx d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 02883-a - 003 f i gure 3. s p i bus t i ming d i agr a m 200 ai oh 1.6v to output pin c l 50pf 200 ai ol 02883-a - 004 f i gur e 4 . l o a d cir c ui t fo r a c c e ss t i me a n d bus reli nqui sh t i m e 4.7k ? 4.7k ? v dd to dac o utput 200 pf 02883-a - 005 f i gure 5. l o ad cir c uit for d a c o u tput s
adt7516/adt7517/adt7519 r e v. a | pa ge 8 o f 4 4 functional block diagram 7 d+/ain1 8 d?/ain2 9 ldac/ain3 14 ain4 ain4 value register ain3 value register ain2 value register ain1 value register v dd value register 12 sda 13 scl 5 gnd 6 v dd 11 add 9 ldac/ain3 3 v ref -in 4 cs address pointer register di gi tal mux di gi tal mux t high limit registers limit comparator t low limit registers v cc limit registers ain high limit registers ain low limit registers control config. 1 register control config. 2 register control config. 3 register dac configuration registers ldac configuration registers interrupt mask registers status registers on-chip temperature sensor internal temperature value register external temperature value register v dd sensor adt7516/adt7517/adt7519 analog mux string dac a a-to-d converter 2 dac a registers string dac b 1 dac b registers string dac c 16 dac c registers string dac d 15 v out -a v out -b v out -c v out -d int/int dac d registers power- down logic gain select logic internal reference spi/smbus interface 10 02883-a - 001 fi g u r e 6 .
adt7516/adt7517/adt7519 r e v. a | pa ge 9 o f 4 4 absolute maximum ratings table 3. p a r a m e t e r r a t i n g v dd to gnd C0.3 v to +7 v analog input voltage to gnd C0.3 v to v dd + 0.3 v digital input voltage to gnd C0.3 v to v dd + 0.3 v digital output v o ltage to gnd C0.3 v to v dd + 0.3 v reference input voltage to gnd C0.3 v to v dd + 0.3 v operating tem p erature range C40c to +120c storage temperature range C65c to +150c junction tempe r ature 150c 16-lead qsop package power dissi pati on 1 (t j max C t a )/ ja thermal imp e d a nce 2 ja junction-to- a m b i e n t 1 0 5 . 4 4 c / w jc junction-to- c a s e 3 8 . 8 c / w ir reflow soldering peak temperature 220c (0c/5c ) time at peak temperature 10 sec to 20 sec ramp-up rate 2c/sec to 3c/sec ramp-down rate C6c/sec table 4. i 2 c a d d r ess selection add pin i 2 c addr ess low 1001 000 float 1001 010 high 1001 011 s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s r a t i ng o n ly ; f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e or a n y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n o f t h is sp e c if ic a t io n is no t im plie d . e x p o sur e t o a b s o l u te max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . 1 va lu es re la t e t o pa cka g e bei n g use d o n a 4- la yer b o a r d. 2 junctio n-to -c as e res i s t ance is appl icab l e to co mpo n e nts fe aturing a prefer ential flow di rection, e.g., comp onents mounted o n a heat sink. junction- t o-amb ient res i s t an ce i s m o r e u s ef ul fo r a i r c ool ed pc b- m o un t e d compon en t s . esd caution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
adt7516/adt7517/adt7519 rev. a | page 10 of 44 pin conf iguration and func tional descri ptions adt7516/ adt7517/ adt7519 top view (not to scale) v out -b 1 v out -c 16 v out -a 2 v out -d 15 v ref -in 3 ain4 14 cs 4 scl/sclk 13 gnd 5 sda/din 12 v dd 6 dout/add 11 d+/ain1 7 int/int 10 d? /ain2 8 ldac/ain3 9 02883-a - 006 f i g u re 7. pin conf ig ur at i o n (qso p p a c k ag e) ta ble 5. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic description 1 v ou t -b buffered analog output voltage from dac b. th e output amplifier has rai l -to-rail operation. 2 v ou t -a buffered analog output voltage from dac a. th e output amplifier has rai l -to-rail operation. 3 v ref -in reference input pin for all four dacs. this inp ut is buffered and has an input range from 1 v to v dd . 4 cs spi active low control input. this is the fram e synchroni z ation signal for the input data. when cs goes lo w, it ena b les the input register, and data is transferre d in on t h e rising ed ges and out on the falling ed ges of t h e subse q uent serial clocks. it is recommended that t h is pin be tied high to v dd when operating the serial interface in i 2 c mode. - 5 gnd ground reference point for all circui try on the part. analog and digital ground . 6 v dd positive supply voltage, 2.7 v to 5.5 v. t h e supply should be decoupled to ground. 7 d+/ain1 d+. positive co nnection to ex ternal temperature sensor. ain1. analog input. single-ended analog input ch anne l. input range is 0 v to 2.28 v or 0 v to v dd . 8 dC/ain2 dC. negative connection to ex ternal temperature sensor. ain2. analog input. single-ended analog input ch anne l. input range is 0 v to 2.28 v or 0 v to v dd . 9 ldac /ain3 ldac . active low control input. transfers the contents of th e input r e gisters to their respective dac registers. a falling edge on this pin forces any or all dac registers to be updated if the input re gisters have new data. a minimum pulse width of 20 ns must be ap plied to the ldac pin to ensure prope r load ing of a dac register. t h is allo ws simul- taneous update of all dac outputs. bit c3 of th e control config uration 3 register enable s the ldac pin. default is with the ldac pin control l i ng the loading of the dac registers. ain3. analog input. single-ended analog input ch anne l. input range is 0 v to 2.28 v or 0 v to v dd . 10 int/ int over limit interrupt. the output polar ity of this pin can be set to give an active low or active high interrupt when temperature,v dd , or ain limits are exceeded. the default is active low. open-dra in outputneeds a pull-up resi stor. 11 dout/add spi serial data output. logic o u t p ut. data is clocked out of any r e gister at this pin. data is cloc ke d out on the falling ed ge of sclk. open-d r ain outp utneed s a pull-up resistor. add. i 2 c serial bus address selection pin. logic input. a low on this pin give s the address 1001 000; leaving it floating gives the address 1001 010; and setting it high gives the address 1001 011. the i 2 c address set up by the add pin is not latched by the device until after this address has been sent twice. on the eig h th scl cycle of the second valid communicatio n , the serial bus a d d r ess is latche d in. any subs equent changes on this pin will have no effect on the i 2 c serial bus ad d r ess. 12 sda/din sda. i 2 c serial d a ta input/ output. i 2 c serial data to be loaded into the parts regi sters and read from these regist ers is provided on this pin. op en-drai n co nfiguration need s a pull- up resistor. din. spi serial d a ta input. seri al data to be loaded into the parts registers is pr ovi d ed on this pin. data is cloc ked into a register on the rising edge of sclk. open- d r ain configuration need s a pull- up resistor. 13 scl/sclk serial clock input. this is the clock input for the serial port. the serial c l oc k is used to clock data out of any re gister of the adt7516/a d t7517/adt75 19 and also to clock data into any register that c a n be written to. open-drain configuration need s a pull-up resistor. 14 ain4 analog input. single-ended analog input channel. input range is 0 v to 2.28 v or 0 v to v dd . 15 v ou t -d buffered analog output voltage from dac d. th e output amplifier has rai l -to-rail operation. 16 v ou t -c buffered analog output voltage from dac c. th e output amplifier has rai l -to-rail operation.
adt7516/adt7517/adt7519 rev. a | page 11 of 44 terminology relative accuracy relative accuracy or integral nonlinearity (inl) is a measure of the maximum deviation, in lsbs, from a straight line passing through the endpoints of the transfer function. typical inl versus code plots can be seen in figure 10, figure 11, and figure 12. differential nonlinearity differential nonlinearity (dnl) is the difference between the measured change and the ideal 1 lsb change between any two adjacent codes. a specified differential nonlinearity of 0.9 lsb maximum ensures monotonicity. typical dac dnl versus code plots can be seen in figure 13, figure 14, and figure 15. total unadjusted error (tue) total unadjusted error is a comprehensive specification that includes the sum of the relative accuracy error, gain error, and offset error under a specified set of conditions. offset error this is a measure of the offset error of the dac and the output amplifier (see figure 8 and figure 9). it can be negative or positive, and it is expressed in mv. offset error match this is the difference in offset error between any two channels. gain error this is a measure of the span error of the dac. it is the deviation in slope of the actual dac transfer characteristic from the ideal expressed as a percentage of the full-scale range. gain error match this is the difference in gain error between any two channels. offset error drift this is a measure of the change in offset error with changes in temperature. it is expressed in (ppm of full-scale range)/c. gain er r or drift this is a measure of the change in gain error with changes in temperature. it is expressed in (ppm of full-scale range)/c. long term temperature drift this is a measure of the change in temperature error with the passage of time. it is expressed in c. the concept of long-term stability has been used for many years to describe the amount an ics parameter would shift during its lifetime. this is a concept that has typically been applied to both voltage references and monolithic temperature sensors. unfortunately, integrated circuits cannot be evaluated at room temperature (25c) for 10 years or so to determine this shift. manufacturers perform accelerated lifetime testing of integrated circuits by operating ics at elevated temperatures (between 125c and 150c) over a shorter period (typically between 500 and 1000 hours). as a result, the lifetime of an integrated circuit is significantly accelerated due to the increase in rates of reaction within the semiconductor material. dc power supply rejection ratio (psrr) this indicates how the output of the dac is affected by changes in the supply voltage. psrr is the ratio of the change in v out to a change in v dd for full-scale output of the dac. it is measured in db. v ref is held at 2 v and v dd is varied 10%. dc crosstalk this is the dc change in the output level of one dac in response to a change in the output of another dac. it is measured with a full-scale output change on one dac while monitoring another dac. it is expressed in v. reference feedthrough this is the ratio of the amplitude of the signal at the dac output to the reference input when the dac output is not being updated (i.e., ldac is high). it is expressed in db. channel-to-channel isolation this is the ratio of the amplitude of the signal at the output of one dac to a sine wave on the reference input of another dac. it is measured in db. major-code transition glitch energy major-code transition glitch energy is the energy of the impulse injected into the analog output when the code in the dac register changes state. it is normally specified as the area of the glitch in nv-s and is measured when the digital code is changed by 1 lsb at the major carry transition (011 . . . 11 to 100 . . . 00 or 100 . . . 00 to 011 . . . 11). digital feedthrough digital feedthrough is a measure of the impulse injected into the analog output of a dac from the digital input pins of the device but is measured when the dac is not being written to. it is specified in nv-s and is measured with a full-scale change on the digital input pins, i.e., from all 0s to all 1s or vice versa. digital crosstalk this is the glitch impulse transferred to the output of one dac at midscale in response to a full-scale code change (all 0s to all 1s and vice versa) in the input register of another dac. it is measured in standalone mode and is expressed in nv-s. analog crosstalk this is the glitch impulse transferred to the output of one dac due to a change in the output of another dac. it is measured by loading one of the input registers with a full-scale code change (all 0s to all 1s and vice versa) while keeping ldac high. then pulse ldac low and monitor the output of the dac whose digital code was not changed. the area of the glitch is expressed in nv-s.
adt7516/adt7517/adt7519 rev. a | page 12 of 44 dac-to-dac crossta l k this is t h e g l i t ch im p u ls e t r a n sfer r e d t o t h e o u t p u t o f o n e d a c d u e to a dig i t a l co de cha n ge and sub s e q ue n t ou t p ut cha n ge o f a n o t h e r d a c. t h is in cl udes b o t h dig i t a l and a n a l o g cr o sst a l k. i t is m e as ur ed b y l o adin g on e o f th e d a cs wi t h a f u l l -s cale co de c h a n g e (al l 0s t o al l 1s a nd vice v e rs a) wi th ld a c lo w a nd mon i tor i ng t h e output of anot h e r d a c . t h e e n e r g y of t h e g l itc h is ex p r ess e d i n nv -s. multiplying b a ndwidth the am plif iers wi t h in t h e d a c ha v e a f i ni te b a n d wi d t h. t h e m u l t i p ly in g b a nd w i d t h is a m e a s ur e o f t h is. a sin e w a v e on t h e re f e re nc e ( w it h f u l l - s c a l e c o d e l o a d e d to t h e d a c ) a p p e ar s on t h e o u t p ut. th e m u l t i p l y in g b a nd w i d t h is t h e f r e q uen c y a t w h ich t h e o u t p u t a m pl i t ude fal l s t o 3 db b e lo w t h e i n p u t. total h a rmon i c distortion this is t h e dif f er en ce b e tw e e n an ide a l si n e wa ve a nd i t s a t t e n u a t e d v e rsio n usin g t h e d a c. the si n e w a v e is us e d as t h e r e fer e n c e fo r t h e d a c, an d t h e thd is a m e as u r e o f t h e ha r m o n ics p r es en t on t h e d a c o u t p ut, exp r es s e d i n db . rou n d rob i n this t e r m is us e d t o des c r i be t h e adt7516/adt7517/ adt7519 c y c l in g thr o ug h the a v a i la b l e m e as u r em en t c h a n ne ls in s e q u ence, t a k i n g a m e asur e m en t on e a ch ch annel. dac output s e ttling time this is t h e t i m e r e q u ir e d , fol l o w in g a p r es cr ib e d d a t a ch a n ge , fo r t h e output of a d a c to re a c h a n d re m a i n w i t h i n 0 . 5 l s b of t h e f i nal val u e . a typ i cal p r es cr ibe d c h a n g e is f r o m 1/4 s c ale t o 3/4 s c ale . amplifier footroom lower deadband codes negative offset error gain error + offset error actual output voltage negative offset error dac code ideal 02883-a - 007 f i gure 8 . d a c t r a n s f er f u nctio n wi th nega ti v e o ffset actual gain error + offset error upper deadband codes output voltage positive offset error dac code full scale ideal 02883-a - 008 f i gure 9 . d a c t r a n s f er f u nctio n wi th p o si ti v e o ffset ( v re f = v dd )
adt7516/adt7517/adt7519 rev. a | page 13 of 44 typical perf orm ance cha r acte ristics ? 0.20 ? 0.15 ? 0.10 ? 0.05 0 0.05 inl e rror (ls b ) 0.10 0.15 0.20 0 5 0 100 150 200 250 dac code 02883-a - 009 f i gur e 1 0 . ad t7 51 9 t y pi c a l d a c inl p l o t 0.6 0 200 400 600 dac code inl e rror (ls b ) 800 1000 ?0.6 ?0.4 ?0.2 0 0.2 0.4 02883-a - 010 f i gur e 1 1 . ad t7 51 7 t y pi c a l d a c inl p l o t 20 00 150 0 500 10 00 0 2 500 3000 3500 4000 dac code ? 2.5 ? 2.0 ? 1.5 ? 1.0 ? 0.5 0 0.5 1.0 1.5 2.0 2.5 i n l e rror (ls b ) 02883-a - 011 f i gur e 1 2 . ad t7 51 6 t y pi c a l d a c inl p l o t ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 0.10 dnl e rror (ls b ) 0 5 0 100 150 200 250 dac code 02883-a - 012 f i gur e 1 3 . ad t7 51 9 t y pi c a l d a c dnl p l o t ? 0.3 ? 0.2 ? 0.1 0 0.1 0.2 0.3 dnl e rror (ls b ) 0 200 400 600 800 1000 dac code 02883-a - 013 f i gur e 1 4 . ad t7 51 7 t y pi c a l d a c dnl p l o t 2000 1 500 500 1000 0 2500 3000 350 0 4000 dac code ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 0.4 0.6 0.8 1.0 dnl e rror (ls b ) 02883-a - 014 f i gur e 1 5 . ad t7 51 6 t y pi c a l d a c dnl p l o t
adt7516/adt7517/adt7519 rev. a | page 14 of 44 0.30 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v ref (v) e rror (ls b ) ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 0.25 inl wcp dnl wcp dnl wcn inl wcn 02883-a - 015 f i gur e 1 6 . ad t7 51 9 d a c inl a n d dnl er r o r vs . v ref 0.14 ? 4 0 110 80 50 20 ?1 0 temperature ( c) e rror (ls b ) ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 0.10 0.12 dnl wcn inl wcp inl wcn dnl wcp 02883-a - 016 f i gure 17. a d t 7 5 1 9 d a c inl e r ror and dnl e rror v s . t e mper atu r e 0 ?40 120 100 80 60 40 20 0 ?2 0 temperature ( c) e rror (ls b ) ? 1.8 ? 1.6 ? 1.4 ? 1.2 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 offset error gain error 02883-a - 017 f i gure 18. d a c o ffs et e rror and g a i n e rror v s . t e mper ature e rror (ls b ) ?2 0 ?1 5 ?1 0 ?5 0 5 10 2.7 3.3 3.6 4.0 v dd (v) 4.5 5.0 5.5 offset error gain error v ref = 2.25v 02883-a - 018 f i gure 19. d a c o ffs et e rror and g a i n e rror v s . v dd source current sink current 2.505 dac outp ut (v ) 2.465 2.470 2.475 2.480 2.485 2.490 2.495 2.500 01 2 3 current (ma) 45 6 v dd =5 v v ref =5 v dac outp ut loade d t o m i d sca l e 0 2883-a - 019 f i g u re 20. da c v ou t so ur c e an d si n k c u r r e n t c a pa b i l i ty 0 ?40 120 100 80 60 40 20 0 ?2 0 temperature ( c) e rror (ls b ) ? 1.8 ? 1.6 ? 1.4 ? 1.2 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 offset error gain error 02883-a - 017 f i gure 21. sup p l y current v s . d a c cod e
adt7516/adt7517/adt7519 rev. a | page 15 of 44 02883-a - 021 2.00 2.7 3.1 3.5 3.9 4.3 4.7 5.1 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.5 v cc (v) i cc (ma) 1.75 1.80 1.85 1.90 1.95 adc off dac outputs at 0v f i gure 22. sup p l y current v s . sup p ly v o ltag e @ 25 c 02883-a - 022 7 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 v cc (v) i cc (ma) 0 1 2 3 4 5 6 f i gure 23. p o wer - d o wn cur r ent vs. su p p ly v o ltage @ 25 c 4.0 02 4 6 8 1 time ( s) dac outp ut (v ) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 02883-a - 023 f i g u re 24. da c ha lf -s c a le s e t t l ing ( 1 / 4 to 3/ 4 s c a l e cod e c h ang e ) 1.8 dac outp ut (v ) 0.8 1.0 1.2 1.4 1.6 0.6 02 4 time ( s) 68 0.4 0.2 0 1 0 02883-a - 024 f i g u re 25. e x it ing p o wer - d o wn to m i d s c a l e 0.4700 0 2 468 1 0 time ( s) dac outp ut (v ) 0.4650 0.4655 0.4660 0.4665 0.4670 0.4675 0.4680 0.4685 0.4690 0.4695 02883-a - 025 f i gur e 2 6 . ad t7 51 6 d a c maj o r co de t r a n si tio n gl it c h ener gy ; 011 11 to 100...00 0.4730 02 4 6 8 1 0 time ( s) dac outp ut (v ) 0.4685 0.4690 0.4695 0.4700 0.4705 0.4710 0.4715 0.4720 0.4725 02883-a - 026 f i gur e 2 7 . ad t7 51 6 d a c maj o r co de t r a n si tio n gl it c h ener gy ; 10 0 00 to 0 1 1 1 1
adt7516/adt7517/adt7519 rev. a | page 16 of 44 0 full-s cale e rror (mv ) ?12 ?10 ?8 ?6 ?4 ?2 12 3 v ref (v) 45 v dd =5 v t a =2 5 c 02 883-a - 027 f i gure 28. d a c f u l l - s c a l e e rror v s . v re f 2.329 01 2 3 4 time ( s) 2.322 2.323 2.324 2.325 2.326 2.327 2.328 5 v dd = 5v v ref = 5v dac output loaded to midscale 02883-a - 028 dac outp ut (v ) f i gure 29. d a c-to -d a c crosstalk 02883-a - 029 1.0 0 200 400 600 800 1000 adc code inl e rror (ls b ) ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 0.4 0.6 0.8 f i g u re 30. a d c inl wit h r e f = v dd (3. 3 v ) 02883-a - 030 ?1 0 ac p s rr (db) ?6 0 ?5 0 ?4 0 ?3 0 ?2 0 0 1 1 0 100 frequency (khz) 100mv ripple on v cc v ref = 2.25v v dd = 3.3v temperature = 25 c f i g u r e 3 1 . p s r r v s . s u pp l y r i pp le f r e q u e n c y 02883-a - 031 temperature ( c) ?30 0 40 85 120 1.5 te mp e rature e rror ( c) ? 1.0 ? 0.5 0 0.5 1.0 e x te rnal te mp era t ure @ 3 .3 v i n te r n a l t em pe ra tu re @ 5 v inte rnal te mp era t ure @ 3 .3 v e x te rnal te mp era t ure @ 5 v f i g u re 32. inte rn al t e m p er at ure e r r o r @ 3. 3 v and 5 v 02883-a - 032 e rror (ls b ) ?1 0 1 2 3 ?2 ?3 ?4 v dd =3 . 3 v ?40 ? 20 0 temperature ( c) 20 40 60 80 100 120 gain er ror off s et err o r f i gure 33. a d c o ffs et e rror and g a i n e rror v s . t e mper ature
adt7516/adt7517/adt7519 rev. a | page 17 of 44 02883-a - 033 v dd (v) e rror (ls b ) 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 ?3 ?2 ?1 0 1 2 3 offset error gain error f i gure 34. a d c o ffs et e rror and g a i n e rror v s . v dd 02883-a - 034 15 te mp e rature e rror ( c) ?1 0 ?5 0 5 10 ?1 5 ?2 0 ?2 5 01 0 2 0 pcb leakage resistance (m ? ) 30 40 50 60 70 80 90 100 v dd =3 . 3 v te mp era t ure = 2 5 c d+ to gnd d+ to v cc f i g u re 35. e x ter n a l t e m p er at ure e r r o r v s . pcb l e ak ag e r e s i s t anc e 02883-a - 035 te mp e rature e rror ( c) ?60 ?50 ?40 ?30 ?20 ?10 0 v dd =3 . 3 v 0 5 10 15 20 25 capacitance (nf) 30 35 40 45 50 f i gure 36. e x ter n a l t e m p er ature e r r o r v s . capacit a nce be t w een d+ and d C 02883-a - 036 10 te mp e rature e rror ( c) 0 2 4 6 8 ?2 ?4 ?6 noise frequency (hz) v dd = 3.3v common-mode voltage = 100mv 1 100 200 300 400 500 600 f i gure 37. e x ter n a l t e m p er ature e r r o r v s . com m on-m ode no ise f r equ e nc y 02883-a - 037 70 te mp e rature e rror ( c) 20 30 40 50 60 10 0 ?10 1 100 200 noise frequency (mhz) 300 400 500 600 v dd = 3.3v differential-mode voltage = 100mv f i gure 38. e x ter n a l t e m p er ature e r r o r v s . d i ffer e nti a l-m o de n o ise f r equenc y 02883-a - 038 noise frequency (hz) 250mv v dd = 3.3v 1 100 200 300 400 500 600 0.6 temperature error ( c) ?0.4 ?0.2 0 0.2 0.4 ?0.6 f i gure 39. inte rn al t e m p er ature e r r o r v s . p o wer sup p l y n o is e f r equenc y
adt7516/adt7517/adt7519 rev. a | page 18 of 44 02883-a - 039 140 te mp e rature ( c) 40 60 80 100 120 20 0 10 20 time (s) 30 40 50 0 60 external temperature t e m p e r a t u r e o f e n v i r o n m e n t c h a n g e d h e r e internal temperature f i gur e 4 0 . t e m p er atur e se nsor re spo n se t o ther ma l sho c k 0 atte nuation (db) ?2 5 ?2 0 ?1 5 ?1 0 ?5 1 10 100 1k 10k 100k 1m 10m frequency (hz) 02883-a - 040 f i g u re 41. da c m u l t iply ing band widt h (small s i gnal f r eq uenc y resp ons e )
adt7516/adt7517/adt7519 rev. a | page 19 of 44 theory of operation directly after the power-up calibration routine, the adt7516/ adt7517/adt7519 go into idle mode. in this mode, the devices are not performing any measurements and are fully powered up. all four dac outputs are at 0 v. to begin monitoring, write to the control configuration 1 register (address 18h) and set bit c0 = 1. the adt7516/ adt7517/adt7519 go into their power-up default measure- ment mode, which is round robin. the devices proceed to take measurements on the v dd channel, internal temperature sensor channel, external temperature sensor channel, or ain1 and ain2, ain3, and finally ain4. once they finish taking measurements on the ain4 channel, the devices immediately loop back to start taking measurements on the v dd channel and repeats the same cycle as before. this loop continues until the monitoring is stopped by resetting bit c0 of the control configuration 1 register to 0. it is also possible to continue monitoring as well as switching to single-channel mode by writing to the control configuration 2 register (address 19h) and setting bit c4 = 1. further explana- tion of the single-channel and round robin measurement modes is given in later sections. all measurement channels have averaging enabled on them on power-up. averaging forces the devices to take an average of 16 readings before giving a final measured result. to disable averaging and consequently decrease the conversion time by a factor of 16, set bit c5 = 1 in the control configuration 2 register. there are four single-ended analog input channels on the adt7516/adt7517/adt7519: ain1 to ain4. ain1 and ain2 are multiplexed with the external temperature sensor terminals d+ and dC. bits c1 and c2 of the control configuration 1 register (address 18h) are used to select between ain1/ain2 and the external temperature sensor. the input range on the analog input channels is dependent on whether the adc reference used is the internal v ref or v dd . to meet linearity specifications, it is recommended that the maximum v dd value is 5 v. bit c4 of the control configuration 3 register is used to select between the internal reference or v dd as the analog inputs adc reference. controlling the dac outputs can be done by writing to the dacs msb and lsb registers (addresses 10h to 17h). the power-up default setting is to have a low going pulse on the ldac pin (pin 9) controlling the updating of the dac outputs from the dac registers. alternatively, one can configure the updating of the dac outputs to be controlled by means other than the ldac pin by setting bit c3 = 1 of the control configuration 3 register (address 1ah). the dac configur- ation register (address 1bh) and the ldac configuration register (address 1ch) can now be used to control the dac updating. these two registers also control the output range of the dacs and selecting between the internal or external refer- ence. dac a and dac b outputs can be configured to give a voltage output proportional to the temperature of the internal and external temperature sensors, respectively. the dual serial interface defaults to the i 2 c protocol on power- up. to select and lock in the spi protocol, follow the selection process as described in the serial interface selection section. the i 2 c protocol cannot be locked in, while the spi protocol is automatically locked in on selection. the interface can be switched back to be i 2 c on selection when the device is powered off and on. when using i 2 c, the cs pin should be tied to either v dd or gnd. there are a number of different operating modes on the adt7516/adt7517/adt7519 devices and all of them can be controlled by the configuration registers. these features consist of enabling and disabling interrupts, polarity of the int/ int pin, enabling and disabling the averaging on the measurement channels smbus timeout and software reset. power-up calibration it is recommended that no communication to the part be ini- tiated until approximately 5 ms after v dd has settled to within 10% of its final value. it is generally accepted that most systems take a maximum of 50 ms to power up. power-up time is directly related to the amount of decoupling on the voltage supply line. during the 5 ms after v dd has settled, the part is performing a calibration routine. any communication to the device during calibration will interrupt this routine, and could cause erro- neous temperature measurements. if it is not possible to have v dd at its nominal value by the time 50 ms has elapsed or if communication to the device has started prior to v dd settling, it is recommended that a measurement be taken on the v dd chan- nel before a temperature measurement is taken. the v dd measurement is used to calibrate out any temperature measure- ment error due to different supply voltage values. conversion speed the internal oscillator circuit used by the adc has the capa- bility to output two different clock frequencies. this means that the adc is capable of running at two different speeds when doing a conversion on a measurement channel. thus, the time taken to perform a conversion on a channel can be reduced by setting bit c0 of the control configuration 3 register (address 1ah). this increases the adc clock speed from 1.4 khz to 22 khz. at the higher clock speed, the analog filters on the d+ and dC input pins (external temperature sensor) are switched off. this is why the power-up default setting is to have the adc working at the slow speed. the typical times for fast and slow adc speeds are given in the specifications.
adt7516/adt7517/adt7519 rev. a | page 20 of 44 the ad t7516 /adt7517/ad t7519 p o w e r u p wi t h a v era g ing on . t h i s me a n s e v e r y ch an n e l i s me a s u r e d 1 6 t i me s a n d in t e r n al l y a v erag ed t o r e d u c e no is e . th e con v ersio n tim e ca n als o be s p ed u p b y t u r n in g o f f th e a v era g in g. this is do ne b y s e t t i n g b i t c 5 o f t h e co n t r o l co n f i g u r a t i o n 2 r e g i s t e r (a ddr es s 19h) to 1. func tio n descript io nvoltag e outpu t digital-to-an a log convert e rs the ad t7516 /adt7517/ad t7519 ha v e f o ur r e sis t o r s t r i n g d a c s f a br i c ate d on a c m o s pro c e s s w i t h re s o lut i ons of 1 2 , 1 0 , a nd 8 b i ts, r e sp e c t i vely . t h e y co n t a i n fo ur o u t p u t b u f f er a m pli - f i ers a n d a r e wr i t t e n t o vi a i 2 c se ri al i n t e rf a c e o r s p i se ri al in t e r - f a c e . see th e se ri al i n t e rf a c e secti o n f o r m o r e in f o rm a t i o n . the ad t7516 /adt7517/ad t7519 o p era t e f r o m a sin g l e s u p - p l y o f 2.7 v t o 5 . 5 v , a nd t h e o u t p u t b u f f er a m p l if iers p r o v ide ra il-t o-ra il o u t p u t s w in g wi th a s l ew r a t e o f 0.7 v/s. al l f o ur d a c s sh are a c o m m o n re f e re n c e i n p u t , v ref - i n . t h e re f e re nc e in p u t is b u f f er e d t o dra w vir t ua l l y n o c u r r en t f r o m t h e r e fer e n c e s o ur ce b e ca us e i t o f fers t h e s o ur ce a hig h i m p e da n c e in p u t. the de vices h a ve a p o w e r - do wn m o de in w h ich a l l d a cs m a y b e tu r n e d of f c o mp l e t e l y w i t h a h i g h i m p e d a nc e o u tpu t . e a c h d a c o u t p u t wil l n o t b e u p da ted u n til i t r e cei v es t h e ld a c co mmand . th er efo r e , w h i l e t h e d a c r e g i s t ers w o u l d ha v e b e e n wr i t ten t o wi t h a ne w va l u e , t h is va lue wi l l n o t b e r e p r es en t e d b y a v o l t a g e o u t p u t un t i l t h e d a cs ha v e r e ceiv e d t h e l d a c co m m a n d . r e adi n g b a ck f r o m an y d a c r e g i st er p r ior to issu ing an l d a c c o m m and wi l l re su lt in t h e dig i t a l val u e t h a t co r r es p o n d s t o t h e d a c o u t p ut v o l t ag e . th us, t h e dig i t a l val u e wr i t t e n t o t h e d a c r e g i s t er ca nn ot b e r e ad b a ck un t i l a f t e r t h e l d a c co mman d has b e en i n i t i a te d . this l d a c co mman d can b e g i ven b y ei t h e r p u l l in g t h e ld a c pi n l o w (fal lin g edg e lo ads d a cs), s e t t in g u p b i ts d4 and d5 o f th e d a c co nf igura t io n r e g i st er (a d d r e ss 1bh), o r usin g t h e ld a c r e g i ster (a ddr ess 1c h). wh e n u s i n g t h e ld a c pi n to c o n t ro l t h e d a c re g i st e r l o a d i n g , th e lo w g o in g p u ls e wid t h sh o u ld be 20 n s minim u m. the ld a c p i n has to go hi g h an d lo w a g ai n b e fo r e t h e d a c re g i ste r s c a n b e rel o a d e d . digital-to-analog section t h e arch ite c tu re of one d a c c h an nel c o ns i s t s of a re s i stor s t r i n g d a c f o l l o w ed b y a n o u t p u t b u f f er a m p l if ier . th e v o l t a g e at t h e v ref - i n pi n or t h e on - c h i p re f e re nc e of 2 . 2 8 v prov i d e s t h e r e fer e n c e v o l t a g e fo r t h e co r r es p o ndin g d a c. f i gur e 42 s h o w s a b l o c k dia g ram o f t h e d a c a r chi t e c t u r e . sin c e t h e in pu t co din g t o t h e d a c is st ra ig h t b i na r y , t h e ide a l ou t p ut v o l t a g e is gi v e n b y n ref out d v v 2 = w h er e: d = decimal eq ui valen t o f t h e b i na r y co de tha t is lo aded t o t h e da c r e g i s t e r : 0 t o 255 f o r ad t7519 (8 b i ts) 0 t o 1023 f o r ad t7517 (10 b i ts ) 0 t o 4095 f o r ad t7516 (12 b i ts ) n = d a c re s o lut i on resistor string t h e re s i stor st r i ng s e c t i o n i s s h ow n i n f i g u re 4 3 . i t i s s i m p ly a s t r i n g o f r e sis t o r s, eac h o f a p p r o x ima t e l y 603 ?. th e dig i tal co de lo ade d to t h e d a c r e g i ster deter m i n es a t w h ich no de on t h e s t r i ng t h e vol t a g e is t a p p e d o f f t o b e fe d in to t h e o u t p u t a m plif ier . th e vol t a g e is t a p p e d o f f b y closin g o n e o f t h e swi t ch es co nnec tin g t h e s t r i n g to th e am p l if ier . b e ca us e i t is a s t r i n g o f r e sis t o r s, i t is gua r a n t e ed m o n o t o nic. input register dac register resistor string v out -a output buffer amplifier gain mode (gain = 1 or 2) reference buffer int v ref v ref -in 02883-a - 041 f i gure 42. sing le da c chann e l a r ch itectur e r r r r r to output amplifier 02883-a - 042 f i gur e 4 3 . resi st or str i ng string dac a 2.28v internal v ref v ref -in string dac b string dac c string dac d 02883-a - 043 f i gure 44. d a c r e f e r e nc e buffer c i rcui t
adt7516/adt7517/adt7519 rev. a | page 21 of 44 dac reference inpu ts ther e is a n in pu t r e fer e n c e pin fo r t h e d a cs. this r e fer e n c e in p u t is b u f f er ed (s ee f i gur e 44 ). the ad v a n t a g e wi t h t h e b u f f er e d in p u t is t h e hi g h im p e dan c e i t p r es en ts t o t h e v o l t a g e s o ur ce dr i v in g i t . th e us er ca n ha v e an exter n a l r e fer e n c e vol t a g e as lo w as 1 v and as hig h as v dd . t h e re st r i c t i o n of 1 v i s d u e to t h e f o ot ro om of t h e re f e re nc e bu f f e r . the ld a c co nf igura t io n r e g i s t er con t r o ls th e o p tio n to s e lec t b e tw e e n i n t e r n a l a nd ext e r n al vol t a g e r e fer e n c e s . th e defa u l t s e t t i n g is fo r ex ter n a l r e fer e nc e s e le c t e d . out p ut amplifier the o u t p u t b u f f er a m plif ier can g e n e r a t e o u t p ut v o l t a g es t o wi t h in 1 mv o f ei t h er ra i l . i t s ac t u al ran g e de p e n d s on t h e val u e of v ref , g a i n , a n d of f s e t e r ror . i f a ga in o f 1 is s e lec t e d (b i t s 0 t o 3 o f th e d a c co nf igura t io n r e g i s t er = 0), th e o u t p u t ra n g e is 0.001 v t o v ref . i f a ga in o f 2 is s e lec t e d (b i t s 0 t o 3 o f th e d a c co nf igura t io n r e g i s t er = 1), th e o u t p u t ra n g e is 0.001 v t o 2 v ref . b e c a u s e o f cla m p i n g , h o w e ver , t h e max i m u m o u t p ut is l i mi te d to v dd C 0.001 v . the o u t p u t am plif ier ca n dr i v e a lo ad o f 4.7 k? t o gnd o r v dd , in p a ral l e l wi t h 200 pf t o gnd o r v dd (s ee f i gur e 5). th e s o ur ce a nd sin k ca p a b i li ties o f t h e o u t p u t am p l if ier ca n be s een i n t h e pl ot of f i g u re 2 0 . the s l e w ra t e is 0.7 v/s wi t h a half-s cale s e t t lin g tim e t o 0.5 ls b (a t 8 b i ts) o f 6 s. ther m al volta g e o u tp ut the ad t7516 /adt7517/ad t7519 ca n o u t p u t v o l t a g es tha t a r e prop or t i on a l to te m p e r atu r e. d a c a output c a n b e c o n f i g u r e d t o r e p r es en t t h e t e m p era t ur e o f t h e i n t e r n al s e ns o r w h i l e d a c b o u t p ut can b e c o nf igur e d t o r e p r es en t t h e ext e r n al t e m p er a t ure s e ns or . bit s c 5 a n d c 6 of t h e c o n t ro l c o n f i g u r a t i o n 3 re g i ste r s e l e c t t h e te m p e r a t u r e prop or t i on a l output vo lt age. e a ch t i m e a t e m p era t ur e m e as ur emen t is t a k e n, t h e d a c ou t p ut is u p da t e d . the o u t p u t r e s o l u tio n f o r th e ad t7519 is 8 b i ts wi th 1c ch ange c o r r e s p o nd i n g to 1 l s b ch ange. t h e output re s o lut i on f o r th e adt751 6 a nd ad t7517 a r e ca p a b l e o f 10 b i ts wi th 0.25c c h a n ge c o r r es p o n d in g t o 1 ls b c h a n g e . the def a u l t o u t p u t r e s o l u tion f o r th e adt7 516 a nd ad t75 17 is 8 b i ts. t o in cr e a s e t h is t o 10 b i t s , s e t c1 = 1 in t h e c o n t r o l c o nf igura t io n 3 r e g i s t er . the defa u l t o u t p ut ran g e is 0 v t o v re f a n d t h is can b e i n c r e a s e d to 0 v to 2 v ref . i n cr easin g t h e o u t p u t v o l t a g e s p an t o 2 v ref ca n be don e b y s e t t in g d0 = 1 f o r d a c a (in t er nal tem p - era t ur e s e n s o r ) a nd d1 = 1 fo r d a c b (ext er nal t e m p era t ur e s e n s o r ) in t h e d a c co nf igura t ion r e g i st er (a d d r e ss 1bh). the o u t p u t v o l t a g e is c a p a b l e o f t r ackin g a maxi m u m t e m p - era t ur e ra n g e o f C128c t o +12 7 c, b u t t h e def a u l t s e t t in g is C40c t o +127c. i f th e o u t p u t v o l t a g e ra n g e is 0 v t o v ref -in (v ref -in = 2.25 v), t h en t h is cor r es p o n d s t o 0 v r e p r es en t i n g C40c, an d 1.48 v r e p r es en tin g +127c. this, o f co urs e , wil l g i v e a n u p p e r dead b a nd betw een 1.48 v an d v re f . the i n t e r n al and ext e r n al a n alog t e m p era t ur e of fs et r e g i s t ers ca n be us e d t o va r y this u p p e r dead b a nd and , con s eq uen t l y , th e t e m p era t ur e t h a t 0 v co r r es p o nds t o . t a b l e 6 and t a b l e 7 g i ve exa m ples o f h o w t h is is don e u s in g a d a c o u t p u t v o l t a g e sp an of v ref a nd 2 v re f , r e s p e c t i v e ly . sim p ly wr i t e i n t h e tem p era t ur e val u e , in tw os c o m p lem e n t f o rma t , a t w h ic h 0 v is t o s t a r t. f o r exa m p l e , if usin g th e d a c a o u t p u t an d 0 v t o s t a r t a t C40c, p r og ra m d8h i n t o t h e i n t e r n al a n alog t e m p era t ur e o f fs et r e g- ist e r (a ddr ess 2 1 h). this is an 8-b i t r e g i ster a n d has a t e m p - e r a t u r e of f s e t re s o lut i on of on ly 1 c f o r a l l d e v i c e m o d e l s . u s e t h e fo r m u l as fol l o w in g t h e t a b l es t o det e r m i n e t h e va l u e t o p r og ra m in t o t h e o f fs et r e g i s t ers. table 6. therm a l voltage out p ut (0 v to v ref ) o / p vo ltage (v) defau l t c max c sample c 0 C40 C128 0 0.5 +17 C71 +56 1 +73 C15 +113 1.12 +87 C1 +127 1.47 +127 +39 udb ? 1.5 udb ? +42 udb ? 2 udb ? +99 udb ? 2.25 udb ? +127 udb ? ? uppe r de ad band has be e n re ache d . da c o u tput is no t capabl e of increasing. see fig . u r e 9 c1 d+ low-pass filter f c = 65khz bias diode v dd to adc v out+ v out? remote sensing transistor (2n3906) optional capacitor, up to 3nf max. can be added to improve high frequency noise rejection in noisy environments d? i n i i bias 02883-a - 044 f i g u re 45. sig n al condit ion i ng f o r e x t e rn al d i ode t e mpe r at ure s e ns o r
adt7516/adt7517/adt7519 rev. a | page 22 of 44 bias diode internal sense transistor v dd to adc v out+ v out ? i n i i bias 02883-a - 045 f i g u re 46. t o p l e ve l st ruc t u r e of in ter n al t e mpe r at u r e s e n s or table 7. therm a l voltage out p ut (0 v to 2 v re f ) o / p vo ltage (v) defau l t c max c sample c 0 C40 C128 0 0.25 C26 C114 +14 0.5 +12 C100 +28 0.75 +3 C85 +43 1 +17 C71 +57 1.12 +23 C65 +63 1.47 +43 C45 +83 1.5 +45 C43 +85 2 +73 C15 +113 2.25 +88 0 +127 2.5 +102 +14 udb ? 2.75 +116 +28 udb ? 3 udb ? +42 udb ? 3.25 udb ? +56 udb ? 3.5 udb ? +70 udb ? 3.75 udb ? +85 udb ? 4 udb ? +99 udb ? 4.25 udb ? +113 udb ? 4.5 udb ? +127 udb ? n e g a t i ve te m p e r a t u r e s : () ( ) 128 0 + = w h er e: d7 o f of fs et reg i s t er c o de is s e t t o 1 f o r n e ga t i v e t e m p era t ur es . ex a m p l e : () () = = + ? = 88 128 40 sin c e a nega t i ve t e m p era t ur e has b e e n ins e r t e d in t o t h e e q u a t i on , db 7 ( m sb ) of t h e of f s e t re g i ste r c o d e i s s e t to 1 . ther efo r e 58h b e co m e s d8h. 58h + d b 7(1) = d8h p o s i t i ve te m p e r a t u r e s : of f s e t re gis t e r co d e (d) = 0 v t e m p ex a m p l e : of f s e t re gis t e r co d e (d) = 10d = 0ah t h e f o l l ow i n g e q u a t i on i s u s e d to wor k out t h e v a r i ou s t e m p era t ur es fo r t h e co r r es p o ndin g 8- b i t d a c o u t p ut: ( ) ( ) 0 1 / 8 + = ? f o r exa m ple , if th e o u t p ut is 1.5 v , v ref -in = 2.25 v , 8-b i t d a c has a n l s b size = 2.25 v/256 = 8.79 10 C3 , a nd 0 v tem p is a t C128c, then t h e r e s u l t a n t t e m p era t ur e is ( ) () + = ? + ? 43 128 10 79 . 8 5 . 1 3 t h e f o l l ow i n g e q u a t i on i s u s e d to wor k out t h e v a r i ou s t e m p era t ur es fo r t h e co r r es p o ndin g 10- b i t d a c o u t p ut: 10- b i t t e m p = ( ( da c o / p 1 ls b) 0.25) + ( 0 v t e m p ) f o r exa m p l e , if th e o u t p u t is 0.4 991 v , v ref -in = 2.25 v , 10-b i t d a c has an ls b size = 2.25 v/1024 = 2.197 10 C3 , a n d 0 v t e m p is a t C40 c, t h en t h e r e s u l t in g t e m p era t u r e is (((0.4991 2.19 7 10 C3 ) 0.25) + (C40) = +16. 75c f i g u re 4 7 show s a g r a p h of t h e d a c output ve r s u s te m p e r atu r e fo r a v ref -in = 2.25 v . temperature ( c) dac outp ut (v ) 0 0.15 ?128 ?110 ? 9 0 ? 70 ?50 ? 30 ? 1 0 1 0 3 0 5 0 7 0 9 0 110 127 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50 1.65 1.80 1.95 2.10 2.25 0v = ? 128 c 0v = ? 40 c 0v = 0 c 02883-a - 046 f i g u re 47. da c o u t p ut v s . t e mpe r at u r e v ref -in = 2. 25 v
adt7516/adt7517/adt7519 rev. a | page 23 of 44 func tio n a l descripti o n anal og in puts single-ended inputs the ad t7516 /adt7517/ad t7519 o f f e r f o ur sin g le-en d e d an a l o g i n put ch an n e l s . t h e an a l o g i n put r a ng e i s f rom 0 v to 2.28 v , o r 0 v t o v dd . t o ma i n t a i n t h e li n e a r i t y sp e c if ic a t io n, i t i s r e co mme n d e d t h a t t h e max i m u m v dd val u e b e s e t a t 5 v . s e le c t ion b e twe e n t h e t w o in p u t ra n g es is don e b y bi t c4 o f t h e c o n t r o l c o nf igura t io n 3 r e g i ster (a ddr ess 1a h). s e t t in g t h is b i t t o 0 s e ts u p t h e a n alog in p u t ad c r e f e r e n c e t o be s o ur ce d f r o m t h e i n t e r n al v o l t a g e r e fer e n c e o f 2.28 v . s e t t in g t h e b i t t o 1 s e ts up t h e a d c re f e re nc e to b e s o u r c e d f rom v dd . the a d c r e s o lu t i o n is 10 b i ts a nd is m o st ly sui t a b le fo r dc i n pu t s i g n a l s . bit s c 1 : 2 of t h e c o n t ro l c o n f i g u r a t i o n 1 re g i ste r (a ddr es s 18h) ar e us ed t o s e t u p p i n s 7 an d 8 as ain1 an d a i n 2 . f i g u re 4 8 show s t h e ove r a l l v i e w of t h e 4 - ch an nel an a l o g in p u t p a t h . m u l t i p l e x e r 10-bit adc to adc value register ain1 ain2 ain3 ain4 02883-a - 047 f i g u re 48. q u ad a n al og input p a t h convert e r op er ation the a n alog in pu t cha n n e ls us e a s u cces s i v e a ppr o x ima t ion a d c b a s e d on a c a p a c i tor d a c . f i g u re 4 9 an d f i g u re 5 0 show s i m - pl i f i e d s c he m a t i c s of t h e a d c . f i g u re 4 9 show s t h e a d c d u r i n g acq u isi t ion pha s e . sw2 is clos e d an d s w 1 is i n p o si t i o n a. th e co m p a r a t o r is he ld in a ba lan c e d con d i t io n an d th e s a m p ling ca p a c i t o r acq u ires t h e sig n al on ain. control logic cap dac acquisition phase sampling capacitor comparator int v ref ref v dd a in sw1 a b sw2 ref/2 02883-a - 048 f i g u re 49. a d c ac quis it i o n p h as e control logic cap dac conversion phase sampling capacitor comparator int v ref ref v dd a in sw1 a b sw2 ref/2 02883-a - 049 f i g u re 50. a d c co nvers i on p h as e w h en t h e ad c e v en t u al ly g o es in t o con v ersio n phas e (s e e f i gur e 50), sw2 o p en s and sw1 m o v e s t o p o si tio n b , c a usin g th e com p a r a t o r t o become un ba lan c e d . th e con t r o l log i c a n d t h e d a c a r e us e d to ad d and sub t r a c t f i xe d am o u n t s o f cha r ge f r o m th e s a m p lin g ca p a c i t o r t o b r in g t h e com p a r a t o r back in t o a balanced condi t io n. w h en t h e co m p a r a t o r is r e balan c e d , the co n v ersio n is com p let e . the co n t r o l log i c g e n e ra t e s th e ad c output c o d e . f i g u re 5 1 show s t h e a d c t r ans f e r f u nc t i o n f o r t h e an a l o g i n put s . adc tra n s f er func ti on the o u t p u t co din g o f th e adt7 516/adt7517/adt7519 a n alog in p u ts is s t ra ig h t b i na r y . th e desig n e d co de tran si tio n s o c c u r mid w a y between s u cces s i v e in teg e r ls b val u es (i .e ., 1/2 ls b , 3/2 ls b). th e l s b is v dd /1024 o r in t e r n al v ref /1024, in t e r n al v ref = 2.28 v . th e ideal tra n sf er c h a r ac t e r i s t ic is s h o w n in f i gur e 51. 111...111 111...110 111...000 011...111 +v ref ? 1lsb 0v 1/2lsb analog input adc code 1lsb = int v ref /1024 1lsb = v dd /1024 000...010 000...001 000...000 02883-a - 050 f i gure 51. sing le -ended t r ansfe r f u nc tion t o work out t h e volt age on a n y an a l o g i n put ch an n e l, t h e f o l l o w in g m e t h o d can be us e d : 1 ls b = re f e re n c e (v)/1024 c o n v er t val u e re ad b a ck f r o m ain val u e reg i st er in t o decimal. () = d = decimal ex a m p l e : i n te r n a l re f e re n c e u s e d . t h e r e f ore v ref = 2.28 v . ain val u e = 51 2d 3 10 226 . 2 1024 / 28 . 2 1 ? = = v voltage ain 14 . 1 10 226 . 2 512 3 = = ?
adt7516/adt7517/adt7519 rev. a | page 24 of 44 analog input esd protection f i g u re 5 2 show s t h e i n put st r u c t u r e on a n y of t h e an a l o g i n put pi ns t h a t prov i d e s e s d prote c t i on . t h e d i o d e prov i d e s t h e m a i n es d p r o t ecti o n f o r th e a n alog i n p u t s . c a r e m u s t be ta k e n tha t th e a n alog i n p u t si gn al n e v e r d r o p s be lo w t h e gn d ra il b y m o r e than 200 mv . i f this ha p p en s, th e dio d e wil l become fo r w a r d-b i as e d a nd st a r t co nd u c t i n g c u r r en t in to t h e subst r a t e. the 4 pf ca p a c i t o r is th e typ i cal p i n c a p a c i tan c e a nd t h e r e sis t o r is a l u m p ed com p on en t made u p o f th e o n r e s i s t an ce o f the m u lt ip l e x e r s w it c h . 4pf a in 100 ? 02883-a - 051 f i g u re 52. equiv a le nt a n al og input e s d ci r c u i t ain int e rrupts the m e as ur e d r e s u l t s f r o m t h e ain i n p u ts a r e co m p a r e d w i t h th e a i n v hi g h (g r e a t er tha n com p a r is o n ) an d v lo w (les s tha n o r e q ua l t o com p ar is o n ) limi ts. a n in t e r r u p t o c c u rs if t h e ai n in p u ts exce e d or e q ual t h e limi t r e g i s t ers. th es e v o l t a g e limi ts a r e s t o r e d in on-chi p r e g i st ers. n o t e t h a t t h e li mi t r e g i st ers a r e 8 b i ts lo n g while t h e ain co n v ersio n r e s u l t is 10 b i ts lo n g . i f t h e v o l t a g e li mi ts a r e n o t mask e d ou t, t h e n an y o u t - o f -limi t com- pa ri so n s g e n e ra t e f l a g s tha t a r e s t o r e d in th e i n t e rr u p t s t a t u s 1 re g i ste r ( a d d r e s s = 0 0 h ) an d o n e or more out - o f - l i m it re su lt s wi l l c a us e t h e i n t/ int o u t p u t t o p u l l ei th er hig h or lo w dep e n d in g on th e o u t p u t p o la r i ty s e t t ing. i t is g o o d desig n p r ac tice t o mask o u t in t e r r u p ts f o r c h a n n e ls tha t a r e o f n o co n c er n t o t h e a p plica t io n. f i gu r e 53 s h o w s t h e in t e r r u p t s t r u c t ur e f o r th e adt7516/ ad t7517/adt7 519. i t g i v e s a b l o c k di a g ra m rep r es en t a t i on o f h o w t h e va r i o u s m e as ur e m en t ch an nel s af fe c t t h e i n t / int pi n . ? upper d e a d ba n d h a s been r e a c h e d. d ac out p ut i s n o t c a pa ble o f i n crea si n g. see . figure 9 watchdog limit comparisons interrupt mask registers control configuration register 1 interrupt status register (temp and ain1 to ain4) interrupt status register 2 (v dd ) s t atus bits s t atus bit read reset s/w reset internal temp int/int (latched output) int/int enable bit external temp v dd diode fault ain1? ain4 02883-a - 052 f i gur e 5 3 . ad t7 51 6/ ad t7 51 7/ ad t7 519 inte rr upt str u ctur e
adt7516/adt7517/adt7519 rev. a | page 25 of 44 functional descriptionmeasurement temperature sensor the adt7516/adt7517/adt7519 contain an adc with special input signal conditioning to enable operation with external and on-chip diode temperature sensors. when the adt7516/adt7517/adt7519 is oper ating in single-channel mode, the adc continually processes the measurement taken on one channel only. this channel is preselected by bits c0:c2 in the control configuration 2 register (address 19h). when in round robin mode, the analog input multiplexer sequentially selects the v dd input channel, the on-chip temperature sensor to measure its internal temperature, either the external temper- ature sensor or ain1 and ain2, ain3, and then ain4. these signals are digitized by the adc and the results are stored in the various value registers. the measured results from the temperature sensors are com- pared with the internal and external t high , t low limits. these temperature limits are stored in on-chip registers. if the temp- erature limits are not masked, any out-of-limit comparisons generate flags that are stored in the interrupt status 1 register. one or more out-of-limit results will cause the int/ int output to pull either high or low depending on the output polarity setting. theoretically, the temperature measuring circuit can measure temperatures from C128c to +127c with a resolution of 0.25c. however, temperatures outside t a are outside the guaranteed operating temperature range of the device. temp- erature measurement from C128c to +127c is possible using an external sensor. temperature measurement is initiated by three methods. the first method is applicable when the part is in single-channel measurement mode. the temperature is measured 16 times and internally averaged to reduce noise. in single-channel mode, the part is continuously monitoring the selected channel, i.e., as soon as one measurement is taken another one is started on the same channel. the total time to measure a temperature channel with the adc operating at slow speed is typically 11.4 ms (712 s 16) for the internal temperature sensor and 24.22 ms (1.51 ms 16) for the external temperature sensor. the new temperature value is stored in two 8-bit registers and is ready for reading by the i 2 c or spi interface. the user has the option of disabling the averaging by setting bit 5 in the control configuration 2 register (address 19h). the adt7516/ adt7517/adt7519 default on power-up with averaging enabled. the second method is applicable when the part is in round robin measurement mode. the part measures both the internal and external temperature sensors as it cycles through all pos- sible measurement channels. the two temperature channels are measured each time the part runs a round robin sequence. in round robin mode, the part is continuously measuring all channels. temperature measurement is also initiated after every read or write to the part when the part is in either single-channel measurement mode or round robin measurement mode. once serial communication has started, any conversion in pro- gress stops and the adc resets. conversion restarts immedi- ately after the serial communication has finished. the temp- erature measurement proceeds normally as described above. v dd monitoring the adt7516/adt7517/adt7519 also have the ability to monitor its own power supply. the part measures the voltage on its v dd pin to a resolution of 10 bits. the resulting value is stored in two 8-bit registers; the two lsbs are stored in register address 03h and the eight msbs are stored in register address 06h. this allows the option of doing just a 1-byte read if 10-bit resolution is not important. the measured result is compared with the v high and v low limits. if the v dd interrupt is not masked, any out-of-limit comparison generates a flag in the interrupt status 2 register and one or more out-of-limit results will cause the int/ int output to pull either high or low, depending on the output polarity setting. measuring the voltage on the v dd pin is regarded as monitoring a channel along with the internal, external, and ain channels. the user can select the v dd channel for single-channel measurement by setting bit c4 = 1 and setting bits c0:c2 to all 0s in the control configuration 2 register. when measuring the v dd value, the reference for the adc is sourced from the internal reference. table 8 shows the data format. as the maximum v dd voltage measurable is 7 v, internal scaling is performed on the v dd voltage to match the 2.28 v internal reference value. below is an example of how the transfer function works. v dd = 5 v adc reference = 2.28 v 1 lsb = adc reference/2 10 = 2.28/1024 = 2.226 mv scale factor = full-scale v cc / adc reference = 7/2.28 = 3.07 conversion result = v dd /( scale factor lsb size ) = 5/(3.07 2.226 mv) = 2 dch
adt7516/adt7517/adt7519 rev. a | page 26 of 44 table 8. v dd data format (v ref = 2. 28 v) digital output v dd value ( v ) binary hex 2.7 01 1000 1011 18b 3 01 1011 0111 1b7 3.5 10 0000 0000 200 4 10 0100 1001 249 4.5 10 1001 0010 292 5 10 1101 1100 2dc 5.5 11 0010 0101 325 6 11 0110 1110 36e 6.5 11 1011 0111 3b7 7 11 1111 1111 3ff on-chip ref e rence the ad t7516 /adt7517/ad t7519 ha v e an o n -c hi p 1.2 v b a nd ga p r e f e r e n c e w h ic h is ga in e d u p b y a swi t ch e d ca p a c i t o r a m p l i- f i er t o g i v e a n ou t p u t o f 2.28 v . the am p l if ier is p o w e r e d u p f o r t h e d u r a t i on o f t h e d e vice m o ni to r i n g phas e and is p o w e r e d do wn on c e m o ni t o r i n g is dis a b l ed . this s a v e s on c u r r en t co n- s u m p t i on. th e i n t e r n al r e fer e n c e is us e d as t h e r e fer e n c e fo r t h e ad c. th e ad c is us e d fo r m e a s ur in g v dd i n te r n a l te m p e r a t u r e s e n s o r ext e r n al t e m p era t ur e s e ns o r a n d ai n in p u ts. th e i n te r n a l re f e re n c e i s a l w a y s u s e d w h e n me a s u r i n g v dd a nd t h e in t e r n al and exter n al t e m p er a t u r e s e n s o r s. th e ext e r n al re f e re nc e i s t h e d e f a u l t p o we r - up re f e re nc e f o r t h e d a c s . r o und r o bin meas ur em ent on p o w e r - u p th e adt7516/ad t7517/adt7 519 g o in t o r o u nd r o b i n m o de b u t m o n i to r i n g is di s a b l e d . s e t t i n g bi t c0 o f t h e c o nf igura t io n reg i st er 1 t o 1 e n a b les con v ersio n s. i t s e q u e n ce s t h r o u g h al l t h e a v a i la b l e channe ls t a kin g a me as ur emen t f r o m ea c h in th e f o llo w in g o r d e r v dd i n te r n a l te m p e r a t u r e s e ns or ext e r n al t e m p er a t ur e s e n s o r /(a i n1 an d ai n2) ain3 an d ain4. p i n 7 an d p i n 8 can be conf igur ed t o b e ei th er ext e r n al t e m p era t ur e s e ns o r p i n s o r s t andalon e a n alog in p u t p i n s . on ce co n v ersio n is com p let e d o n t h e ain4 c h ann e l t h e de vice lo o p s arou nd f o r a n ot he r me a s u r e m e n t c y cl e. t h i s m e t h o d of t a k i ng a m e as ur e m en t o n al l t h e cha n nels in o n e c y cle is cal l e d r o u nd r o b i n. s e t t i n g bi t c4 o f c o n t r o l c o nf igur a t io n 2 (a ddr ess 19h) dis a b l es t h e r o u nd r o b i n m o de a nd i n t u r n s e ts u p t h e si n g le- cha n n e l m o de . the sin g le- c ha nn el mo de is w h e r e o n ly o n e c h a n n e l e . g. in ter n al t e m p er a t u r e s e n s o r is m e as ur ed in each co n v ersio n c y c l e . t h e t i me t a k e n to mon i tor a l l c h an nel s w i l l nor m a l ly not b e of in t e r e st since t h e m o s t r e c e n t ly m e as ur e d va l u e ca n b e r e ad a t a n y t i me . f o r a p plica t ion s w h ere t h e r o u n d r o b i n t i m e is i m p o r - ta n t t y p i cal tim e s a t 25 c a r e gi v e n in th e s p ecif i c a t i o n s . single-chann el measurement s e t t in g c4 o f t h e c o n t r o l c o nf igura t io n 2 r e g i st er ena b les t h e sin g le-c ha nne l m o de and al lo ws th e adt7516/adt7517/ adt7519 t o f o c u s o n o n e c h a n n e l o n l y . a c h ann e l is s e lec t ed b y wr i t i n g t o bi ts c0c2 in t h e c o n t r o l c o nf igura t io n 2 r e g i st er . f o r exa m ple t o s e le c t t h e v dd ch an nel for mo n i tor i ng w r ite to t h e c o n t r o l c o nf igur a t io n 2 r e g i ster an d s e t c 4 to 1 (if n o t do ne s o alr e ad y ) th en wr i t e al l 0s t o b i ts c0c2 . al l s u bs eq uen t co n v ersio n s wil l be done o n t h e v dd c h a n n e l only . t o c h a n g e t h e cha n n e l s e le c t ion t o t h e in t e r n al t e m p era t ur e cha nne l wr i t e t o t h e c o n t r o l c o nf igur a t io n 2 r e g i ster an d s e t c 0 = 1. w h en m e as ur in g in sin g le-c ha nne l mo de con v ersio n s o n t h e c h a n nel se l e ct ed oc cu r di r e ctl y a f t e r ea c h o t h e r . an y c o m m u n ic a t i o n t o th e adt7516/ad t7517/adt7 519 s t o p s the con v ersio n s b u t t h e y are re st ar te d o n c e t h e re a d or w r ite op e r a t i o n i s c o m p l e te d . tem p er at ur e meas ur em ent metho d internal tem p erature measurement the ad t7516 /adt7517/ad t7519 co n t a i n an o n c hi p band ga p t e m p era t ure s e n s o r w h os e o u t p ut is dig i t i e d b t h e o n chi p ad c. th e t e m p era t ur e da t a is st o r e d i n t h e i n t e r n al t e m p er a t ur e v a l u e r e g i s t er . b e ca us e b o t h p o si t i v e an d n e g a t i ve t e m p er a t ur es c a n b e me as ur e d , t h e t e m p er a t ur e da t a is s t o r e d i n tw os co m p le m e n t fo r m a t , as sh o w n i n t a b l e 9. the t h er mal cha r ac t e r i s t ics o f t h e m e as ur e m en t s e n s o r co u l d cha n g e a n d , t h er efo r e , a n o f fs et is adde d t o t h e m e as ure d val u e t o ena b le t h e t r a n sfer fun c ti o n t o m a t c h th e th e r m a l c h a r a c t e ri s t i c s . th i s o f fse t i s adde d b e fo r e t h e t e m p era t ur e da t a is s t o r e d . the o f fs et val u e us e d is s t o r e d i n t h e in t e r n al t e m p er a t ur e o f fs et r e g i s t er . external tem p erature measurement the ad t7516 /adt7517/ad t7519 ca n m e as u r e th e t e m p er a t ur e o f on e exter n al dio d e s e ns o r o r dio d econn e c t e d tra n s i s t o r . the fo r w a r d v o l t a g e o f a dio d e o r dio d econn e c t e d t r a n sist o r , o p era t e d a t a con s t a n t c u r r en t, exhi b i ts a n e ga t i v e t e m p era t ur e co ef f i cien t o f a b o u t C2 mv/c. n f o r t una t e l , be ca us e t h e ab s o lute v a lu e o f v be va r i es f r o m device t o de vice , a nd indivi d u a l ca lib r a t io n is r e u ir e d t o n u l l t h is o u t, t h e t e chni u e is u n su i t abl e for mass p r o d u c t i on. the t e c h ni u e us ed in t h e adt7516/adt751 7/adt7519 is to m e as ur e t h e chan g e in v be w h en th e de vice is op era t e d a t tw o dif f er en t c u r r en ts. this is g i v e n b ( ) = ?
adt7516/adt7517/adt7519 rev. a | page 27 of 44 i f a d i sc r e t e tra n s i s t o r i s u s ed , th e c o ll ect o r w i ll n o t be g r o u n d e d , a n d sh o u ld be lin k e d t o t h e b a s e . i f a p n p t r a n sist o r is us e d , t h e b a s e is co nne c t e d t o t h e d C i n p u t and t h e emi t t e r to th e d+ in p u t. i f a n np n tran sis t o r is us ed , th e emi t t e r is co nne c t e d t o t h e dC i n p u t an d t h e b a s e t o t h e d+ in p u t. a 2n3906 is r e c o mmende d as t h e ext e r n al tra n sis t o r . t o p r e v e n t g r o u nd n o i s e i n t e r f er in g wi t h t h e me as ur emen t, t h e more ne g a t i v e t e r m i n a l of t h e s e ns or i s no t re fe re nc e d to g r o u n d , b u t is b i as ed abo v e g r o u n d b y an in t e r n al dio d e a t t h e dC i n p u t. a s t h e s e n s o r is o p er a t in g in a n o isy en vir o n m e n t, c 1 is p r o v ide d as a n o is e f i l t er . s e e t h e l a yo u t c o nsidera t io n s s e c t io n fo r m o re info r m a t io n on c1. to m e a s u r e ? v be , th e se n s o r i s s w i t ch e d be tw e e n o p e r a t i n g c u r r en ts o f i a n d n i. th e r e su l t in g wa v e f o r m is p a s s e d thr o ug h a lo w-p a s s f i l t er t o r e mo v e n o is e , t h en to a c h o p p e r - st a b i l i z e d a m pl i f ier t h a t p e r f o r m s t h e f u n c t i ons o f a m plif ica t ion a n d r e c t if ic a t ion o f t h e w a v e fo r m t o p r o d uc e a dc v o l t a g e prop or t i on a l to ? v be . this v o l t age is m e asur e d b y t h e a d c t o g i v e a t e m p era t ur e o u t p u t in 10 -b i t tw os co m p l e m e n t f o r m a t . t o f u r t h e r r e d u ce t h e ef fe c t s o f n o i s e , dig i t a l f i l t er i n g is p e r f o r m e d b y a v era g in g t h e r e s u l t s o f 16 m e as ur e m en t c y cles. layout c o ns id er ations dig i tal bo a r ds c a n be e l e c tr ical ly n o isy en vir o nm e n ts, and ca r e m u s t b e t a k e n to p r o t e c t t h e a n a l og in p u ts f r o m n o is e , p a r t ic u - la rl y w h en m e asur in g th e v e r y smal l v o l t a g es f r o m a r e m o te d i o d e s e ns or . t h e f o l l ow i n g pr e c aut i ons s h ou l d b e t a ke n : 1. p l ace t h e adt7 516/adt7517/adt7519 as c l os e as p o s s i b le t o t h e rem o t e s e n s in g dio d e . p r o v ide d tha t t h e worst nois e s o u r c e s su ch as cl o c k ge ner a tors , d a t a /ad d ress b u s e s, a n d cr t s a r e a v o i de d , this dis t an c e can b e 4 in ch es t o 8 in ch es. 2. ro u t e t h e d+ and dC t r acks clos e t o g e t h er , in p a ral l e l , wi t h g r ou nd e d g u ard t r a c k s on e a c h s i d e . prov i d e a g r ou nd plan e u n der t h e t r acks, if p o ssi b le. 3. u s e wi de t r acks t o minim i ze i n d u c t an ce and r e d u ce n o is e p i ck u p . a 10 mi l t r ack min i m u m wid t h and sp acin g is r e co mme n d e d . gn d d+ d? gn d 10 m i l 10 m i l 10 m i l 10 m i l 10 m i l 10 m i l 10 m i l 02883-a - 053 f i gure 5 4 . a r r a ngem ent o f s i gnal t r acks 4. t r y t o minimize t h e n u m b er o f co p p er/s older j o in ts, w h ich ca n ca us e t h er m o cou p le ef fe c t s. w h er e co pp er /s older jo i n ts a r e used , m a k e s u r e th a t th ey a r e i n bo t h th e d + a n d d C p a t h a n d at t h e s a m e t e mp e r at u r e . ther m o co u p le ef f e c t s s h o u ld no t be a ma jo r p r ob lem be ca us e 1 c co r r es p o n d s t o a b ou t 240 v , an d t h er mo co u p le vol t a g es a r e ab o u t 3 v/ c o f t e m p er a t ur e dif f er en ce . u n le s s t h er e a r e tw o t h er mo co u p les wi t h a b i g t e m p era t ur e dif f er en t i al b e tw e e n t h em, t h er m o co u p le v o l t a g es sh o u ld be m u c h les s tha n 200 mv . 5. p l ace 0.1 f b y p a s s an d 2200 p f in p u t f i l t er ca p a ci t o rs c l os e t o th e adt7516/adt751 7/adt7519. 6. i f th e dis t an ce to th e r e m o t e s e n s o r is m o r e than 8 in ch es, t h e us e o f t w ist e d-p a ir cab l e is re co m m e n de d . t h is wi l l w o rk u p t o abou t 6 f e et t o 12 f e et. 7. f o r lo n g dis t an c e s (u p t o 100 f e et), us e s h ie lde d twis t e d- p a ir ca b l e , s u c h as b e lden #8451 micr o p h o n e cab l e . c o n- n e c t t h e t w ist e d p a ir t o d+ a n d dC. an d t h e shield t o gn d c l os e t o th e adt7516/adt751 7/adt7519. l e a v e t h e r e m o te e n d o f t h e shiel d unco n n e c te d to a v o i d g r o u n d lo o p s. b e ca us e t h e m e as ur emen t t e chniq u e us es s w i t ch e d c u r r en t s o ur ces, exces s i v e ca b l e and/o r f i l t er ca p a c i t a n c e can a f fe c t t h e m e as ur e m en t. w h en usin g lo ng ca b l es, t h e f i l t er ca p a ci t o r ma y b e r e d u ce d o r rem o ve d. c a b l e r e sis t an ce ca n als o i n t r o d uce er r o rs. s e r i e s r e sis t a n c e o f 1 ? in tr o d uces a b o u t 0.5 c er r o r . t e m p er a t ure v a l u e f o rma t on e l s b o f th e ad c co r r es p o nds t o 0.25c. the ad c can t h e o r e t i cal l y m e as ur e a t e m p era t ur e s p a n o f 255 c. th e i n t e r n al t e m p era t ur e s e ns o r is gua r a n tee d t o a lo w val u e limi t o f C40c. i t is p o s s i b le t o m e as ur e t h e f u l l t e m p era t ur e s p a n usin g t h e ext e r n al t e m p er a t ur e s e n s o r . the t e m p era t ur e da t a fo r m a t is shown i n t a bl e 9 . the r e s u l t o f t h e in ter n al o r ext e r n al t e m p er a t u r e m e as ur e- m e n t s is st o r e d in t h e t e m p era t ur e val u e r e g i s t ers, a n d is com- pa r e d wi th lim i ts p r ogra m m e d in t o th e in t e rn al o r e x t e rn al h i gh a n d lo w r e g i s t ers.
adt7516/adt7517/adt7519 rev. a | page 28 of 44 table 9. temp erature data format (in t ern a l an d e x tern al tem p erature) temperature digital output C40c 11 0110 0000 C25c 11 1001 1100 C10c 11 1101 1000 C0.25c 11 1111 1111 0c 00 0000 0000 +0.25c 00 0000 0001 +10c 00 0010 1000 +25c 00 0110 0100 +50c 00 1100 1000 +75c 01 0010 1100 +100c 01 1001 0000 +105c 01 1010 0100 +125c 01 1111 0100 t e m p er a t ur e con v ersio n fo r m u l a: p o s i ti ve t e m p er a t u r e = ad c c o d e / 4 n e ga ti ve t e m p er a t u r e = (a d c c o de* C 51 2)/4 *wher e d b 9 is r e m o v e d f r o m t h e ad c co de. interrupts the m e as ur e d r e s u l t s f r o m t h e i n t e r n al t e m p er a t ur e s e n s o r , ext e r n al t e m p er a t ur e s e n s o r , v dd p i n, and ai n i n p u ts a r e co m p a r ed wi th th e t hi g h /v hi g h ( g re a t e r t h an c o m p ar i s on ) a n d t lo w /v lo w (les s tha n o r eq u a l t o co m p a r is o n ) limi ts. an in t e r - r u p t o c c u rs if t h e m e as ur e m en t exce e d s o r e q ua ls t h e limi t r e g i s t ers. th es e limi ts a r e s t o r e d in o n -chi p r e g i s t ers. n o t e t h a t t h e li mi t r e g i s t e r s a r e 8 b i ts lo ng w h i l e t h e con v ersio n r e s u l t s ar e 10 b i ts lo n g . i f t h e limi ts a r e n o t mask e d , a n y o u t-o f -limi t com- p a r i s o n s g e n e r a t e f l a g s tha t a r e s t o r ed in t h e i n ter r u p t s t a t us 1 r e g i s t er (a ddr ess 00h) an d i n t e r r u p t s t a t us 2 r e g i s t er (a ddr es s 01h). on e o r m o r e o u t-o f -limi t r e s u l t s wi l l c a us e t h e int/ int output to pu l l e i t h e r h i g h or l o w d e p e n d i n g on t h e o u t p u t p o la r i ty s e t t in g. i t is g o o d desig n p r ac t i c e t o mask o u t i n te r r upt s for ch an nel s t h a t are of no c o nc e r n t o t h e a p pl i c a t i o n . f i gur e 53 s h o w s th e in t e r r u p t s t r u c t ur e f o r th e adt7516/ adt7517/ad t7519. i t g i v e s a b l o c k dia g ra m rep r es en t a tion o f h o w t h e va r i o u s m e as ur emen t cha n n e ls a f fe c t t h e i n t/ int pi n . adt7516/adt7517/adt7519 regi sters the ad t7516 /adt7517/ad t7519 co n t a i n r e g i s t ers tha t a r e us e d t o s t o r e t h e r e s u l t s o f ext e r n al a n d in t e r n al t e m p era t ur e me a s u r e m e n t s , v dd val u e m e asur em en ts, a n alog in p u t m e as ur e - m e n t s, hig h and lo w t e m p era t ure limi ts, s u p p l y v o l t a g e and a n a l og in p u t l i mi ts, s e t o u t p u t d a c v o l t a g e le ve ls, co nf igur e m u lt ipu r p o s e pi ns , an d ge ne r a l l y to c o n t ro l t h e d e v i c e . a des c r i p t io n o f t h es e r e g i s t ers fol l o w s. the r e g i s t er ma p is di v i de d in t o r e g i s t ers o f 8 b i ts. e a ch r e g i s t er has i t s own i n divi d u a l a ddr ess, b u t s o me co n s ist o f da t a t h a t is lin k e d w i t h o t her r e g i s t ers. th e s e r e g i s t ers h o ld t h e 10- b i t co n v ersio n r e s u l t s o f m e as ur e m en ts t a k e n on t h e t e m p era t ur e , v dd , a n d ai n cha n n e ls. f o r exa m ple , t h e eig h t ms bs o f t h e v dd m e as ur e m en t a r e s t o r e d in r e g i st er a ddr ess 06h w h i l e t h e tw o ls bs a r e s t o r e d in r e g i s t er a d dr es s 03h. th e li n k i n v o l v e d b e tw e e n t h es e t y p e s o f r e g i s t ers is t h a t w h e n t h e ls b r e g i s t er is r e ad f i rs t, t h e m s b r e g i s t ers ass o ci a t e d wi t h t h a t ls b r e g i s t er a r e l o c k e d t o p r ev en t a n y u p da t e s . t o unl o c k t h e s e ms b r e gi s t e r s , t h e us er has onl y t o r e ad a n y one o f t h em, w h ich w i l l ha ve t h e ef f e c t o f unlo c k in g al l p r e v io us ly lo c k e d m s b r e g i s t ers. s o f o r th e p r ec edin g exa m p l e , if reg ist e r 03h was r e ad f i rs t, ms b reg ist e rs 06h and 07h w o u l d b e lo c k e d t o p r even t an y u p da t e s t o th em. i f reg is t e r 06h was r e ad , this r e g i s t er and reg i s t er 07 h w o u l d be s u bs e q uen t l y unlo c k e d . l o ck as s o ci at e d m s b re g i s t e r s f i rs t re ad co m m and ls b r e g i st er ou tp u t dat a 02883-a - 054 f i g u re 55. phas e 1 of 1 0 -bit r e ad unl o c k a s s o ci at e d m s b re g i s t e r s s e co nd re ad co m m and msb r e g i st er ou tp u t dat a 02883-a - 055 f i g u re 56. phas e 2 of 1 0 -bit r e ad i f a n ms b r e g i ster is r e ad f i rs t, i t s co r r es p o n d in g ls b r e g i s t er is n o t lo ck e d , le a v in g th e us er wi th th e o p tion o f j u s t r e adin g back 8 b i ts (ms b ) o f a 10-b i t con v ersio n r e s u l t . readin g a n m s b r e g i s t er f i rs t do es n o t lo ck o t he r ms b r e g i s t ers, a n d li k e wi s e re a d i n g a n l s b re g i ste r f i r s t d o e s not l o c k ot h e r l s b re g i ste r s . table 10. a d t7516/adt7 517 /adt7519 reg i sters rd/wr addres s name power-on defau l t 00h interrupt status 1 00h 01h interrupt status 2 00h 02h reserved 03h internal temp and v dd lsbs 00h 04h external temp and ain1 to ain4 lsbs 00h 05h reserved 00h 06h v dd m s bs xxh 07h internal temp msbs 00h 08h external temp msbs/ain1 msbs 00h 09h ain2 msbs 00h 0ah ain3 msbs 00h 0bh ain4 msbs 00h 0chC0fh reserved 00h 10h dac a lsbs (adt7516/ad t7 517 only) 00h 11h dac a msbs 00h 12h dac b lsbs (adt7516/ad t7 517 only) 00h 13h dac b msbs 00h 14h dac c lsbs (adt7516/ad t7 517 only) 00h
adt7516/adt7517/adt7519 rev. a | page 29 of 44 rd/wr address name power-on default 15h 00h dac c msbs 16h dac d lsbs (adt7516/ad t7517 only) 00h 17h 00h dac d msbs 18h control conf iguration 1 00h 19h control configuration 2 00h 1ah control configuration 3 00h 1bh dac configuration 00h 1ch ldac configuration 00h 1dh interrupt mask 1 00h 1eh interrupt mask 2 00h 1fh internal temp offs et 00h 20h external temp offset 00h 21h internal analog temp o ffset d8h 22h external analog temp offset d8h 23h v dd v high limit c7h 24h v dd v low limit 62h 25h internal t high li mit 64h 26h internal t low limit c9h 27h external t high /ain1 v high limits ffh 28h l t low /ain1 v low limits 00h externa 29hC2 ah reserved 2bh ain2 v high limit f fh 2bh ain2 v high limit ffh 2ch ain2 v low limit 00h 2dh ain3 v high limit ffh 2eh ain3 v low limit 00h 2fh ain4 v high limit ffh 30h ain4 v low limit 00h 31hC4 ch reserved 4dh device id 0 3h/0bh/07h 4eh manufactur ers id 41h 4fh silicon revision 04h 50hC7 eh reserved 00h 7fh spi lock st atus 00h 80hCf fh reserved 00h in terrupt status 1 register (read-only) [add. = 00h] e this 8-bit read-only register reflects the status of some of th interrupts that can cause the int/ int pin to go active. this register is reset by a read operation provided that any out-of- limit event has been corrected. it is also reset by a software res table 11. interrupt status 1 register et. d2 d1 d0 d7 d6 d5 d4 d3 0* 0* 0* 0* 0* 0* 0* 0* * de fault gs at er-up settin pow . table 12. bit function d0 1 when the internal temperature value exceeds t high limit. any internal temperature reading greater than the set limit will cause an out-of-limit event. d1 1 when internal temperature value exceeds t low limit. any internal temperature reading le ss than or equal to the set limit will cause an out-of-limit event. d2 this status bit is linked to th e configuration of pins 7 and 8. if configured for external temp erature sensor, this bit is 1 when external temperature value exceeds t high limit. the default value for this limit regi ster is C1c, so any external temperature reading greater than the set limit will cause an out-of-limit event. if config ured for ain1 and ain2, this bit is 1 when ain1 input voltage exceeds v high or v low limits. d3 1 when external temperature value exceeds t low limit. the default value for this limit regi ster is 0c, so any external temperature reading less than or equal to the set limit will cause an out-of-limit event. d4 1 indicates a fault (open or short) for the external temperature sensor. d5 1 when ain2 voltage is greater than its corresponding v high limit. 1 when ain2 voltage is less than or equal to its corresponding v low limit. d6 1 when ain3 voltage is greater than its corresponding v high limit. 1 when ain3 voltage is less than or equal to its corresponding v low limit. d7 1 when ain4 voltage is greater than its corresponding v high limit. 1 when ain4 voltage is less than or equal to its corresponding v low limit. interrupt status 2 register (read-only) [add. = 01h] this 8-bit read-only register reflects the status of the v dd inter- rupt that can cause the int/ int pin to go active. this register is reset by a read operation provided that any out-of-limit event has been corrected. it is also reset by a software reset. table 13. interrupt status 2 register d7 d6 d5 d4 d3 d2 d1 d0 n/a n/a n/a 0* n/a n/a n/a n/a * default settings at power-up. table 14. bit function d4 1 when v dd value is greater than its corresponding v high limit. 1 when v dd is less than or equal to its corresponding v low limit.
adt7516/adt7517/adt7519 rev. a | page 30 of 44 internal temperature value/v dd value register lsbs (read-only) [add. = 03h] this 8-bit read-only register stores the two lsbs of the 10-bit temperature reading from the internal temperature sensor and the two lsbs of the 10-bit supply voltage reading. table 15. internal temperature/v dd lsbs d7 d6 d5 d4 d3 d2 d1 d0 n/a n/a n/a n/a v1 lsb t1 lsb n/a n/a n/a n/a 0* 0* 0* 0* * default settings at power-up. table 16. bit function d0 lsb of internal temperature value. d1 b1 of internal temperature value. d2 lsb of v dd value. d3 b1 of v dd value. external temperature value and analog inputs 1 to 4 register lsbs (read-only) [add. = 04h] this is an 8-bit read-only register. bits d2:d7 store the two lsbs of the analog inputs ain2Cain4. bits d0:d1 store the two lsbs of either the external temperature value or ain1 input value. the type of input for d0 and d1 is selected by bits c1:c2 of the control configuration register 1. table 17. external temperature and ain1 to ain4 lsbs d7 d6 d5 d4 d3 d2 d1 d0 a4 a4 lsb a3 a3 lsb a2 a2 lsb t/a t/a lsb 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 18. bit function d0 lsb of external temperature value or ain1 value. d1 bit 1 of external temperature value or ain1 value. d2 lsb of ain2 value. d3 bit 1 of ain2 value. d4 lsb of ain3 value. d5 bit 1 of ain3 value. d6 lsb of ain4 value. d7 bit 1 of ain4 value. v dd value register msbs (read-only) [add. = 6h] this 8-bit read-only register stores the supply voltage value. the eight msbs of the 10-bit value are stored in this register. table 19. v dd value msbs d7 d6 d5 d4 d3 d2 d1 d0 v9 v8 v7 v6 v5 v4 v3 v2 x* x* x* x* x* x* x* x* *loaded with v dd value after power-up. internal temperature value register msbs (read-only) [add. = 07h] this 8-bit read-only register stores the internal temperature value from the internal temperature sensor in twos complement format. the eight msbs of the 10-bit value are stored in this register. table 20. internal temperature value msbs d7 d6 d5 d4 d3 d2 d1 d0 t9 t8 t7 t6 t5 t4 t3 t2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. external temperature value or analog input ain1 register msbs (read-only) [add. = 08h] this 8-bit read-only register stores, if selected, the external temperature value or the analog input ain1 value. selection is done in the control configuration 1 register. the external temperature value is stored in twos complement format. the eight msbs of the 10-bit value are stored in this register. table 21. external temperatur e value/analog inputs msbs d7 d6 d5 d4 d3 d2 d1 d0 t/a9 t/a8 t/a7 t/a6 t/a5 t/a4 t/a3 t/a2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. ain2 register msbs (read) [add. = 09h] this 8-bit read register contains the eight msbs of the ain2 analog input voltage word. the value in this register is com- bined with bits d2:3 of the external temperature value and analog inputs 1 to 4 register lsbs, address 04h, to give the full 10-bit conversion result of the analog value on the ain2 pin. table 22. ain2 msbs d7 d6 d5 d4 d3 d2 d1 d0 msb a8 a7 a6 a5 a4 a3 a2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. ain3 register msbs (read) [add. = 0ah] this 8-bit read register contains the eight msbs of the ain3 analog input voltage word. the value in this register is com- bined with bits d4:5 of the external temperature value and analog inputs 1 to 4 register lsbs, address 04h, to give the full 10-bit conversion result of the analog value on the ain3 pin. table 23. ain3 msbs d7 d6 d5 d4 d3 d2 d1 d0 msb a8 a7 a6 a5 a4 a3 a2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up.
adt7516/adt7517/adt7519 rev. a | page 31 of 44 ain4 register msbs (read) [add. = 0bh] this 8-bit read register contains the eight msbs of the ain4 analog input voltage word. the value in this register is com- bined with bits d6:7 of the external temperature value and analog inputs 1 to 4 register lsbs, address 04h, to give the full 10-bit conversion result of the analog value on the ain4 pin. table 24. ain4 msbs d7 d6 d5 d4 d3 d2 d1 d0 msb a8 a7 a6 a5 a4 a3 a2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. dac a register lsbs (read/write) [add. = 10h] this 8-bit read/write register contains the 4/2 lsbs of the adt7516/adt7517 dac a word, respectively. the value in this register is combined with the value in the dac a register msbs and converted to an analog voltage on the v out -a pin. on power-up, the voltage output on the v out -a pin is 0 v. table 25. dac a (adt7516) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b3 b2 b1 lsb n/a n/a n/a n/a 0* 0* 0* 0* n/ a n/a n/a n/a *default settings at power-up. table 26. dac a (adt7517) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b1 lsb n/a n/a n/a n/a n/a n/a 0* 0* n/a n/a n/ a n/a n/a n/a *default settings at power-up. dac a register msbs (read/write) [add. = 11h] this 8-bit read/write register contains the eight msbs of the dac a word. the value in this register is combined with the value in the dac a register lsbs and converted to an analog voltage on the v out -a pin. on power-up, the voltage output on the v out -a pin is 0 v. table 27. dac a msbs d7 d6 d5 d4 d3 d2 d1 d0 msb b8 b7 b6 b5 b4 b3 b2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. dac b register lsbs (read/write) [add. = 12h] this 8-bit read/write register contains the 4/2 lsbs of the adt7516/adt7517 dac b word, respectively. the value in this register is combined with the value in the dac b register msbs and converted to an analog voltage on the v out -b pin. on power-up, the voltage output on the v out -b pin is 0 v. table 28. dac b (adt7516) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b3 b2 b1 lsb n/a n/a n/a n/a 0* 0* 0* 0* n/ a n/a n/a n/a *default settings at power-up. table 29. dac b (adt7517) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b1 lsb n/a n/a n/a n/a n/a n/a 0* 0* n/a n/a n/a n/a n/a n/a *default settings at power-up. dac b register msbs (read/write) [add. = 13h] this 8-bit read/write register contains the eight msbs of the dac b word. the value combines with the value in the dac b register lsbs and converts to an analog voltage on the v out -b pin. on power-up, the voltage output on the v out -b pin is 0 v. table 30. dac b msbs d7 d6 d5 d4 d3 d2 d1 d0 msb b8 b7 b6 b5 b4 b3 b2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. dac c register lsbs (read/write) [add. = 14h] this 8-bit read/write register contains the 4/2 lsbs of the adt7516/adt7517 dac c word, respectively. the value in this register is combined with the value in the dac c register msbs and converted to an analog voltage on the v out -c pin. on power-up, the voltage output on the v out -c pin is 0 v. table 31. dac c (adt7516) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b3 b2 b1 lsb n/a n/a n/a n/a 0* 0* 0* 0* n/a n/a n/a n/a *default settings at power-up. table 32. dac c (adt7517) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b1 lsb n/a n/a n/a n/a n/a n/a 0* 0* n/a n/a n/a n/a n/a n/a *default settings at power-up. dac c register msbs (read/write) [add. = 15h] this 8-bit read/write register contains the eight msbs of the dac c word. the value in this register is combined with the value in the dac c register lsbs and converted to an analog voltage on the v out -c pin. on power-up, the voltage output on the v out -c pin is 0 v. table 33. dac c msbs d7 d6 d5 d4 d3 d2 d1 d0 msb b8 b7 b6 b5 b4 b3 b2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up.
adt7516/adt7517/adt7519 rev. a | page 32 of 44 dac d register lsbs (read/write) [add. = 16h] this 8-bit read/write register contains the 4/2 lsbs of the adt7516/adt7517 dac d word, respectively. the value in this register is combined with the value in the dac d register msbs and converted to an analog voltage on the v out -d pin. on power-up, the voltage output on the v out -d pin is 0 v. table 34. dac d (adt7516) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b3 b2 b1 lsb n/a n/a n/a n/a 0* 0* 0* 0* n/a n/a n/a n/a *default settings at power-up. table 35. dac d (adt7517) lsbs d7 d6 d5 d4 d3 d2 d1 d0 b1 lsb n/a n/a n/a n/a n/a n/a 0* 0* n/a n/a n/a n/a n/a n/a *default settings at power-up. dac d register msbs (read/write) [add. = 17h] this 8-bit read/write register contains the eight msbs of the dac d word. the register value combines with the value in the dac d register lsbs and converts to an analog voltage on the v out -d pin. on power-up, the voltage output on the v out -d pin is 0 v. table 36. dac d msbs d7 d6 d5 d4 d3 d2 d1 d0 msb b8 b7 b6 b5 b4 b3 b2 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. control configuration 1 register (read/write) [add. = 18h] this configuration register is an 8-bit read/write register that is used to set up some of the operating modes of the adt7516/ adt7517/adt7519. table 37. control configuration 1 d7 d6 d5 d4 d3 d2 d1 d0 pd c6 c5 c4 c3 c2 c1 c0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 38. bit function c0 this bit enables/disables conversions in round robin and single-channel mo de. adt7516/adt7517/adt7519 powers up in round robin mo de but monitoring is not initiated until this bit is set. the default = 0. 0 = stop monitoring. 1 = start monitoring. c2:c1 selects between the two differe nt analog inputs on pins 7 and 8. adt7516/adt7517/adt7519 powers up with ain1 and ain2 selected. 00 = ain1 and ain2 selected. 01 = undefined. 10 = external tdm selected. 11 = undefined. c3 selects between digital (ldac) and analog inputs (ain3) on pin 9. when ain3 is selected, bit c3 of the control configuration 3 register is masked and has no effect until ldac is selected as the input on pin 9. 0 = ldac selected. 1 = ain3 selected. c4 reserved. write 0 only. c5 0 = enable int/ int output. 1 = disable int/ int output. c6 configures int/ int output polarity. 0 = active low. 1 = active high. pd power-down bit. setting th is bit to 1 puts the adt7516/adt7517/adt7519 into standby mode. in this mode, both adc and dacs are fully powered down, but the serial interface is still operational. to power up the part again, just write 0 to this bit. control configuration 2 register (read/write) [add. = 19h] this configuration register is an 8-bit read/write register that is used to set up some of the operating modes of the adt7516/ adt7517/adt7519. table 39. control configuration 2 d7 d6 d5 d4 d3 d2 d1 d0 c7 c6 c5 c4 c3 c2 c1 c0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up.
adt7516/adt7517/adt7519 rev. a | page 33 of 44 table 40. bit function c2:0 in single-channel mode, these bits select between v dd , the internal temperature se nsor, external temperature sensor/ain1, ain2, ain3, and ain4 for conversion. the default is v dd . 000 = v dd . 001 = internal temperature sensor. 010 = external temperature sensor/ain1. (bits c1:c2 of the control configuration 1 register affect this selection). 011 = ain2. 100 = ain3. 101 = ain4. 110C111 = reserved. c3 reserved. c4 selects between single-channel and round robin conver- sion cycle. the default is round robin. 0 = round robin. 1 = single channel. c5 default condition is to average every measurement on all channels 16 times. this bit disables this averaging. channels affected are temperature, analog inputs, and v dd . 0 = enable averaging. 1 = disable averaging. c6 smbus timeout on the serial clock puts a 25 ms limit on the pulse width of the clock, ensuring that a fault on the master scl does not lock up the sda line. 0 = disable smbus timeout. 1 = enable smbus timeout. c7 software reset. setting this bit to 1 causes a software reset. all registers and dac outputs will reset to their default settings. control configuration 3 register (read/write) [add. = 1ah] this configuration register is an 8-bit read/write register that is used to set up some of the operating modes of the adt7516/ adt7517/adt7519. table 41. control configuration 3 d7 d6 d5 d4 d3 d2 d1 d0 c7 c6 c5 c4 c3 c2 c1 c0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 42. bit function c0 selects between fast and slow adc conversion speeds. 0 = adc clock at 1.4 khz. 1 = adc clock at 22.5 khz. d+ and dC analog filters are disabled. c1 on the adt7516 and adt7517, this bit selects between 8- bit and 10-bit dac output re solution on the thermal voltage output feature. the defaul t is 8 bits. this bit has no effect on the adt7519 output because this part has only an 8-bit dac. for the adt7519, write 0 to this bit. bit function 0 = 8-bit resolution. 1 = 10-bit resolution. c2 reserved. write 0 only. c3 0 = ldac pin controls updating of dac outputs. 1 = dac configuration register and ldac configu ration register control updating of dac outputs. c4 selects the adc reference to be either internal v ref or v dd for analog inputs. 0 = internal v ref. 1 = v dd . c5 setting this bit selects dac a voltage output to be proportional to the internal temperature measurement. c6 setting this bit selects dac b voltage output to be proportional to the external temperature measurement. c7 reserved. write 0 only. dac configuration register (read/write) [add. = 1bh] this configuration register is an 8-bit read/write register that is used to control the output ranges of all four dacs and also to control the loading of the dac registers if the ldac pin is disabled (bit c3 = 1 control configuration 3 register). table 43. dac configuration d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 44. bit function d0 selects the output range of dac a. 0 = 0 v to v ref . 1 = 0 v to 2v ref . d1 selects the output range of dac b. 0 = 0 v to v ref . 1 = 0 v to 2v ref . d2 selects the output range of dac c. 0 = 0 v to v ref . 1 = 0 v to 2v ref . d3 selects the output range of dac d. 0 = 0 v to v ref . 1 = 0 v to 2v ref . d5:d 4 00 = msb write to any dac register generates ldac command that updates that dac only. 01 = msb write to dac b or dac d register generates ldac command that updates dacs a, b or dacs c, d, respectively. 10 = msb write to dac d register generates ldac command that updates all four dacs. 11 = ldac command generated from ldac register. d6:d7 reserved. write 0s only.
adt7516/adt7517/adt7519 rev. a | page 34 of 44 ldac configuration register (write-only) [add. = 1ch] this configuration register is an 8-bit write register that is used to control the updating of the quad dac outputs if the ldac pin is disabled and bits d4:d5 of the dac configuration reg- ister are both set to 1. also selects either the internal or external v ref for all four dacs. bits d0:d3 in this register are self-clear- ing, i.e., reading back from this register will always give 0s for these bits. table 45. ldac configuration d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 46. bit function d0 writing a 1 to this bit will generate the ldac command to update dac a output only. d1 writing a 1 to this bit will generate the ldac command to update dac b output only. d2 writing a 1 to this bit will generate the ldac command to update dac c output only. d3 writing a 1 to this bit will generate the ldac command to update dac d output only. d4 selects either internal v ref or external v ref for dacs a and b. 0 = external v ref 1 = internal v ref . d5 selects either internal v ref or external v ref for dacs c and d. 0 = external v ref 1 = internal v ref d6:d7 reserved. write 0s only. interrupt mask 1 register (read/write) [add. = 1dh] this mask register is an 8-bit read/write register that can be used to mask any interrupts that can cause the int/ int pin to go active. table 47. interrupt mask 1 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 48. bit function d0 0 = enable internal t high interrupt. 1 = disable internal t high interrupt. d1 0 = enable internal t low interrupt. 1 = disable internal t low interrupt. d2 0 = enable external t high interrupt or ain1 interrupt. 1 = disable external t high interrupt or ain1 interrupt. d3 0 = enable external t low interrupt. 1 = disable external t low interrupt. d4 0 = enable external te mperature fault interrupt. 1 = disable external temp erature fault interrupt. d5 0 = enable ain2 interrupt. 1 = disable ain2 interrupt. d6 0 = enable ain3 interrupt. 1 = disable ain3 interrupt. d7 0 = enable ain4 interrupt. 1 = disable ain4 interrupt. interrupt mask 2 register (read/write) [add. = 1eh] this mask register is an 8-bit read/write register that can be used to mask any interrupts that can cause the int/ int pin to go active. table 49. interrupt mask 2 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. table 50. bit function d0:d3 reserved. write 0s only. d4 0 = enable v dd interrupts. 1 = disable v dd interrupts. d5:d7 reserved. write 0s only. internal temperature offset register (read/write) [add. = 1fh] this register contains the offset value for the internal temp- erature channel. a twos complement number can be written to this register which is then added to the measured result before it is stored or compared to limits . in this way, a one-point cali- bration can be done whereby the whole transfer function of the channel can be moved up or down. from a software point of view, this may be a very simple method to vary the charac- teristics of the measurement channel if the thermal charac- teristics change. because it is an 8-bit register, the temperature resolution is 1c. table 51. internal temperature offset d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0*
adt7516/adt7517/adt7519 rev. a | page 35 of 44 external temperature offset register (read/write) [add. = 20h] this register contains the offset value for the external temp- erature channel. a twos complement number can be written to this register, which is then added to the measured result before it is stored or compared to limits. in this way, a one-point cali- bration can be done whereby the whole transfer function of the channel can be moved up or down. from a software point of view, this may be a very simple method to vary the charac- teristics of the measurement channel if the thermal charac- teristics change. because it is an 8-bit register, the temperature resolution is 1c. table 52. external temperature offset d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* * default settings at power-up. internal analog temperature offset register (read/write) [add. = 21h] this register contains the offset value for the internal thermal voltage output. a twos complement number can be written to this register, which is then added to the measured result before it is converted by dac a. varying the value in this register has the effect of varying the temperature span. for example, the output voltage can represent a temperature span of C128c to +127c or even 0c to +127c. in essence, this register changes the position of 0 v on the temperature scale. temperatures other than C128c to +127c will produce an upper deadband on the dac a output. because it is an 8-bit register, the temperature resolution is 1c. the default value is C40c. table 53. internal analog temperature offset d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 0* 1* 1* 0* 0* 0* *default settings at power-up. external analog temperature offset register (read/write) [add. = 22h] this register contains the offset value for the external thermal voltage output. a twos complement number can be written to this register which is then added to the measured result before it is converted by dac b. varying the value in this register has the effect of varying the temperature span. for example, the output voltage can represent a temperature span of C128c to +127c or even 0c to +127c. in essence, this register changes the position of 0 v on the temperature scale. temperatures other than C128c to +127c will produce an upper deadband on the dac b output. because it is an 8-bit register, the temperature resolution is 1c. the default value is C40c. table 54. external analog temperature offset d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 0* 1* 1* 0* 0* 0* *default settings at power-up. v dd v high limit register (read/write) [add. = 23h] this limit register is an 8-bit read/write register that stores the v dd upper limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured v dd value has to be greater than the value in this register. the default value is 5.46 v. table 55. v dd v high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 0* 0* 0* 1* 1* 1* *default settings at power-up. v dd v low limit register (read/write) [add. = 24h] this limit register is an 8-bit read/write register that stores the v dd lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured v dd value has to be less than or equal to the value in this register. the default value is 2.7 v. table 56. v dd v low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 1* 1* 0* 0* 0* 1* 0* *default settings at power-up. internal t high limit register (read/write) [add. = 25h] this limit register is an 8-bit read/write register that stores the twos complement of the internal temperature upper limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured internal temp- erature value has to be greater than the value in this register. because it is an 8-bit register, the temperature resolution is 1c. the default value is +100c. table 57. internal t high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 1* 1* 0* 0* 1* 0* 0* *default settings at power-up.
adt7516/adt7517/adt7519 rev. a | page 36 of 44 internal t low limit register (read/write) [add. = 26h] this limit register is an 8-bit read/write register that stores the twos complement of the internal temperature lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured internal temperature value has to be more negative than or equal to the value in this register. because it is an 8-bit register, the temperature reso- lution is 1c. the default value is C55c. table 58. internal t low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 0* 0* 1* 0* 0* 1* external t high /ain1 v high limit register (read/write) [add. = 27h] if pins 7 and 8 are configured for the external temperature sensor, this limit register is an 8-bit read/write register that stores the twos complement of the external temperature upper limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured external temperature value has to be greater than the value in this reg- ister. because it is an 8-bit register, the temperature resolution is 1c. the default value is C1c. if pins 7 and 8 are configured for ain1 and ain2 inputs, this limit register is an 8-bit read/write register that stores the ain1 input upper limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured ain1 value has to be greater than the value in this register. because it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. because the power-up default settings for pins 7 and 8 are ain1 and ain2 inputs, the default value for this limit register is full-scale voltage. table 59. ain1 v high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 1* 1* 1* 1* 1* 1* *default settings at power-up. external t low /ain1 v low limit register (read/write) [add. = 28h] if pins 7 and 8 are configured for the external temperature sensor, this limit register is an 8-bit read/write register that stores the twos complement of the external temperature lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured external temperature value has to be more negative than or equal to the value in this register. because it is an 8-bit register, the temp- erature resolution is 1c. the default value is 0c. if pins 7 and 8 are configured for ain1 and ain2 inputs, this limit register is an 8-bit read/write register that stores the ain1 input lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured ain1 value has to be less than or equal to the value in this reg- ister. as it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. because the power-up default settings for pins 7 and 8 are ain1 and ain2 inputs, the default value for this limit register is 0 v. table 60. ain1 v low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. ain2 v high limit register (read/write) [add. = 2bh] this limit register is an 8-bit read/write register that stores the ain2 input upper limit, which will cause an interrupt and acti- vate the int/ int output (if enabled). for this to happen, the measured ain2 value has to be greater than the value in this register. because it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. the default value is full-scale voltage. table 61. ain2 v high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 1* 1* 1* 1* 1* 1* *default settings at power-up. ain2 v low limit register (read/write) [add. = 2ch] this limit register is an 8-bit read/write register that stores the ain2 input lower limit, which will cause an interrupt and acti- vate the int/ int output (if enabled). for this to happen, the measured ain2 value has to be less than or equal to the value in this register. because it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. the default value is 0 v. table 62. ain2 v low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* ain3 v high limit register (read/write) [add. = 2dh] this limit register is an 8-bit read/write register that stores the ain3 input upper limit, which will cause an interrupt and acti- vate the int/ int output (if enabled). for this to happen, the measured ain3 value has to be greater than the value in this register. because it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. the default value is full-scale voltage. table 63. ain3 v high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 1* 1* 1* 1* 1* 1* *default settings at power-up.
adt7516/adt7517/adt7519 rev. a | page 37 of 44 ain3 v low limit register (read/write) [add. = 2eh] this limit register is an 8-bit read/write register that stores the ain3 input lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured ain3 value has to be less than or equal to the value in this register. because it is an 8-bit register, the reso- lution is four times less than the resolution of the 10-bit adc. the default value is 0 v. table 64. ain3 v low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. ain4 v high limit register (read/write) [add. = 2fh] this limit register is an 8-bit read/write register that stores the ain4 input upper limit, which will cause an interrupt and acti- vate the int/ int output (if enabled). for this to happen, the measured ain4 value has to be greater than the value in this register. because it is an 8-bit register, the resolution is four times less than the resolution of the 10-bit adc. the default value is full-scale voltage. table 65. ain4 v high limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 1* 1* 1* 1* 1* 1* 1* 1* *default settings at power-up. ain4 v low limit register (read/write) [add. = 30h] this limit register is an 8-bit read/write register that stores the ain4 input lower limit, which will cause an interrupt and activate the int/ int output (if enabled). for this to happen, the measured ain4 value has to be less than or equal to the value in this register. because it is an 8-bit register, the reso- lution is four times less than the resolution of the 10-bit adc. the default value is 0 v. table 66. ain4 v low limit d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 0* 0* 0* 0* 0* 0* 0* 0* *default settings at power-up. device id register (read-only) [add. = 4dh] this 8-bit read-only register indicates which part the device is in the model range. adt7516 = 03h, adt7517 = 07h, and adt7519 = 0bh. manufacturers id register (read-only) [add. = 4eh] this register contains the manufacturers identification number. adis id number is 41h. silicon revision register (read-only) [add. = 4fh] this register is divided into the four lsbs representing the stepping and the four msbs representing the version. the stepping contains the manufacturers code for minor revisions or steppings to the silicon. the version is the adt7516/ adt7517/adt7519 version number. spi lock status register (read-only) [add. = 7fh] bit d0 (lsb) of this read-only re gister indicates whether or not the spi interface is locked. writing to this register will cause the device to malfunction. the default value is 00h. 0 = i 2 c interface. 1 = spi interface selected and locked. serial interface there are two serial interfaces that can be used on this part: i 2 c and spi. the device will power up with the serial interface in i 2 c mode, but it is not locked into this mode. to stay in i 2 c mode, it is recommended that the user tie the cs line to either v cc or gnd. it is not possible to lock the i 2 c mode, but it is possible to select and lock the spi mode. to select and lock the interface into the spi mode, a number of pulses must be sent down the cs line (pin 4). the following section describes how this is done. once the spi communication protocol has been locked in, it cannot be unlocked while the device is still powered up. bit d0 of the spi lock status register (address 7fh) is set to 1 when a successful spi interface lock has been accomplished. to reset the serial interface, the user must power down the part and power it up again. a software reset does not reset the serial interface. serial interface selection the cs line controls the selection between i 2 c and spi. figure 59 shows the selection process necessary to lock the spi interface mode. to communicate to the adt7516/adt7517/adt7519 using the spi protocol, send three pulses down the cs line as shown in figure 59. on the third rising edge (marked as c in figure 59), the part selects and locks the spi interface. the user is now limited to communicating to the device using the spi protocol. as per most spi standards, the cs line must be low during every spi communication to the adt7516/adt7517/ adt7519 and high all other times. typical examples of how to connect the dual interface as i 2 c or spi is shown in figure 57 and figure 58. the following sections describe in detail how to use the i 2 c and spi protocols associated with the adt7516/ adt7517/adt7519.
adt7516/adt7517/adt7519 rev. a | page 38 of 44 a d t 7516/ a d t 7517/ a d t 7519 cs sd a sc l add v dd v dd i 2 c addre s s = 10 01 000 10 k ? 10 k ? 02883-a - 057 f i g u re 57. t y pic a l i 2 c inter f ac e c o nnec t ion a d t 7516/ a d t 7517/ a d t 7519 sc l k do ut cs v dd l o ck and s e l e c t spi s p i f r a m in g ed g e 820 ? 820 ? 82 0 ? di n 02883-a - 058 f i gure 58. t y pic a l s p i inter f ac e conn ec tion a b cs ( s t a rt hi g h ) s p i l o cke d o n t h i rd ri s i ng e d g e c s p i f r a m in g ed g e 02883-a - 056 a b cs ( s t art l o w ) spi l o c k e d o n t h i rd ri s i ng e d g e c s p i f ram i n g ed g e f i g u re 59. s e ri al int e r f ace s e lec t ing and l o ck ing s p i proto c o l i 2 c seri al int e r f ac e l i k e al l i2c com p a t i b le de vices, th e adt7516 /adt7517/ adt7519 ha v e a 7-b i t s e r i al addr es s. th e f o ur ms bs o f this addr es s f o r th e adt7516/ad t7517/adt7519 a r e s e t t o 1001. the t h r e e lsbs a r e s e t b y p i n 1 1 , ad d . the a d d p i n can b e co nf igur e d t h r e e wa ys t o g i v e t h r e e dif f er en t addr es s o p t i o n s: lo w , f l o a tin g , and hig h . s e t t in g t h e ad d p i n lo w g i v e s a s e r i al b u s addr es s o f 1 001 000, lea v ing i t f l o a tin g g i v e s th e addr es s 1001 010, a n d s e t t in g i t hig h g i v e s th e addr es s 1001 011. th e r e co mmen d e d p u l l -u p r e sis t o r val u e is 10 k?. ther e is a n e n ab le/dis ab le b i t fo r t h e s m bus t i m e o u t. w h e n t h is i s e n abl e d, t h e sm bu s w i l l t i me out af te r 2 5 ms of no a c t i v i t y . t o ena b le i t , s e t bi t 6 o f t h e c o n t r o l c o nf igura t io n 2 r e g i s t er . the po w e r - o n d e fa u l t i s wi th t h e s m b u s ti m e o u t d i sa b l e d . the ad t7516 /adt7517/ad t7519 s u p p o r t s m b u s p a c k et er r o r c h ec kin g ( p ec), b u t i t s us e is o p tio n al . i t is tr ig g e r e d b y s u p p l y ing t h e ext r a clo c ks fo r t h e p e c b y t e . the p e c is calc u l a t e d usin g cr c-8. th e f r am e clo c k s e q u e n ce (fcs) co nf o r m s t o cr c-8 b y th e p o l y n o minal () 1 1 2 8 + + + = c o n s u l t t h e s m bus sp e c if ic a t ion (w w w .s m b us. o rg) fo r m o r e info r m a t io n. the s e r i al b u s pr o t o c ol o p era t es as fol l o w s: 1. the mas t er ini t i a t e s a da t a t r a n s f er b y es t a b l is hi n g a s t a r t co ndi t ion, def i ne d as a hig h to lo w t r a n si t i o n on t h e s e r i a l da ta lin e s d a w h ile th e se ri al c l oc k lin e scl r e m a i n s hi gh . t h i s in di ca t e s th a t a n a d d r e s s / da ta s t r e a m w i ll f o ll o w . all s l a v e p e r i ph eral s co nne c t e d t o t h e s e r i al b u s r e sp o n d t o t h e s t a r t co ndi t io n a n d s h if t i n t h e n e xt eig h t b i ts, co n s is t i n g o f a 7-b i t addr es s ( m s b f i rs t) p l us a r/ w bi t , w h i c h det e r m i n es t h e dir e c t io n o f t h e da t a t r an sfer , i . e . , w h et h e r d a t a w i l l b e w r itte n to or re a d f r om t h e sl a v e de v i c e . the p e r i ph eral w h os e addr es s c o r r es p o n d s t o t h e tra n sm i t t e d a ddr es s r e s p o n ds b y p u lli n g th e da ta lin e lo w d u ri n g th e l o w pe ri od be f o r e th e n i n t h c l oc k p u l s e , kn o w n a s t h e a c k n ow l e d g e bit . a l l ot h e r d e v i c e s on t h e bu s now r e ma in idle whi l e th e s e lec t e d device wai t s f o r da ta t o b e re a d f r om or w r i tte n to i t . i f t h e r / w b i t is 0 t h e mas t er wil l wr i t e t o t h e s l a v e de vic e . i f t h e r/ w b i t is 1, t h e mas t er wil l r e ad f r o m t h e s l a v e de vice . 2. da ta i s sen t o v e r th e se ri al b u s in seq u en c e s o f n i n e c l oc k p u ls es: eig h t b i ts o f da t a f o l l o w ed b y a n ack n o w ledg e b i t f r o m th e r e ce i v e r o f d a t a . t r a n si ti o n s o n th e d a ta lin e m u s t oc cu r d u ri n g th e l o w pe ri od o f th e c l oc k s i gn al a n d r e m a in s t a b le d u r i n g t h e hig h p e r i o d , b e ca us e a lo w t o hig h tran- si tio n w h en t h e c l o c k is hig h ma y be in t e r p r e t e d as a s t o p sig n al . 3. w h en al l da ta b y t e s ha v e been read o r wr i t t e n, st o p co ndi t ion s a r e e s t a b l ish e d . i n w r i t e m o de , t h e mas t er wi l l p u l l th e da ta line hig h d u r i n g t h e 10th c l o c k p u l s e t o as s e r t a s t o p co n d i t i o n. i n r e a d m o de , th e ma s t er de vice will p u ll th e da ta lin e h i g h d u ri n g t h e lo w pe ri od be f o r e th e ni n t h c l o c k p u ls e . this is kn o w n as n o a c kn o w le dg e . the mast er wil l t h en ta k e t h e da ta l i n e lo w d u r i n g the lo w p e r i o d bef o r e the 10th c l o c k p u ls e , a n d th en hig h d u r i n g th e 10t h clo c k p u ls e to a s s e r t a sto p condi t ion.
adt7516/adt7517/adt7519 rev. a | page 39 of 44 an y n u m b er o f b y t e s o f da t a c a n b e t r a n sfer r e d o v er t h e s e r i al b u s in on e op er a t io n, b u t i t is no t p o ssi b le t o m i x r e ad an d wr i t e in on e o p era t ion b e c a us e t h e ty p e o f o p era t ion is det e r m i n e d a t th e beg i nnin g and ca nn ot s u bs eq uen t l y b e c h an g e d wi th ou t st a r t i n g a ne w op er a t ion. the i 2 c a d d r e s s se t u p b y th e ad d p i n i s n o t la t c h e d b y th e de vice u n t i l a f t e r t h is addr es s has b e en s e n t t w i c e . on t h e eig h t h scl c y cle o f t h e s e co nd va li d comm uni c a t io n, t h e s e r i a l b u s addr ess is l a t c h e d in. this is t h e scl c y cle dir e c t ly a f t e r t h e de vice has s e e n i t s o w n i 2 c s e r i al b u s addr es s. an y s u bs e q ue n t c h a n g e s o n this p i n wil l ha v e n o ef f e c t o n th e i 2 c s e r i al b u s addr ess. writing to the adt7516/adt7517/adt7519 d e p e n d in g on t h e r e g i st er b e ing wr i t t e n t o , t h e r e a r e tw o dif f er en t wr i t es f o r th e adt751 6/adt7517/ad t7519. i t is n o t p o ss ibl e to do a bl o c k w r i t e to t h i s p a r t , i. e. , no i 2 c a u t o - i n cr em en t . writing to the ad dress pointer r e gister fo r a subs eq ue nt r e a d t o r e ad da t a f r om a p a r t ic u l a r r e g i s t er , t h e addres s p o i n t e r r e g i s t er m u s t con t a i n t h e addr ess o f t h a t r e g i s t er . i f i t do es n o t, t h e c o r r e c t a d dre s s m u st b e w r itte n to t h e a ddre s s p o i n te r r e g i s t er b y p e r f o r min g a sin g le -b yt e wr i t e op era t io n, as sh o w n in f i gur e 60. the wr i t e o p er a t ion co n s is ts o f t h e s e r i al b u s addr ess fol l o w e d b y t h e a ddr ess p o in ter b y te. n o da t a is wr i tte n t o a n y o f t h e da t a r e g i s t ers. a r e ad o p er a t io n is t h e n p e r f o r m e d to re a d t h e re g i s t e r . writing data t o a r e gister a l l r e g i s t ers a r e 8-b i t r e g i s t ers, s o o n l y o n e b y t e o f da t a can b e w r it te n to e a ch re g i ste r . w r i t i n g a s i ng l e b y te of d a t a to one of t h es e r e ad/ w r i te r e g i s t ers co n s ists o f t h e s e r i al b u s addr es s, t h e da t a r e g i s t er addr es s wr i t t e n t o t h e addr es s p o i n t e r r e g i s t er , f o ll o w ed b y th e da ta b y t e w r i t t e n t o th e se lec t ed da ta r e gi s t e r . this is il l u s t ra t e d in f i gur e 61. t o wr i t e t o a dif f er en t r e g i s t er , anot he r st ar t or re p e a t e d s t ar t i s re qu i r e d . i f more t h an one b y te o f da t a is s e n t i n on e co mm uni c a t ion o p er a t ion, t h e addr es s e d r e g i s t er wil l b e r e p e a t edl y lo ade d un til t h e last da ta b y te has been sen t . reading data from th e a d t7516/adt751 7/adt7519 readin g da ta f r o m the ad t7 5 16/adt7517/ad t7519 is done in a 1 - b y t e o p era t io n. re adin g b a ck t h e con t e n ts o f a r e g i s t er is s h own in f i gur e 62. th e r e g i s t er addr es s had p r evio us l y been s e t u p b y a sin g l e -b yt e wr i t e o p e r a t io n t o t h e addr es s p o i n t e r r e g i s t er . t o r e ad f r o m a n o t h e r r e g i s t er , wr i t e t o t h e addr es s p o in t e r r e g i s t er a g a i n t o s e t u p t h e r e l e van t r e g i s t er addr es s. t h u s , b l o c k r e a d s a r e n o t p o s s i b l e , i . e . , n o i 2 c a u to - i nc re me n t . spi seri al interface the s p i s e r i al in t e r f ace o f the adt7516/ad t7517/adt7519 co n s is ts o f f o ur wir e s: cs , s c l k , d i n , a n d d o u t . t h e cs is us ed t o s e lec t t h e de vic e w h en m o r e than on e de vice is con- n e ct ed t o th e seri al c l oc k a n d da ta li n e s . th e cs is als o us ed t o dist in gui s h b e t w e e n an y tw o s e p a r a te s e r i a l comm uni c a t io n s (s ee f i gur e 67 f o r a g r a p hical exp l a n a t ion). the sclk is us e d t o cl o c k d a t a i n a n d out of t h e p a r t . t h e d in l i n e is us ed t o wr i t e t o th e r e g i st ers, a n d the d o ut line is us ed t o r e ad da ta b a c k f r o m t h e r e g i st ers. the r e co mm e n de d p u l l -u p r e sis t o r val u e is betw een 500 ? a n d 820 ?. the p a r t o p era t es in sla v e mo de a n d r e q u ir es an ext e r n al l y a p p l i e d se ri al c l oc k t o th e s c lk i n p u t . t h e se ri al in t e rf a c e i s de s i g n e d to a l l o w t h e p a r t to b e i n te r f a c e d to s y ste m s t h a t p r o v ide a s e r i a l clo c k t h a t is sy nchr o n iz e d t o t h e s e r i a l da t a . ther e a r e tw o t y p e s o f s e r i al o p era t io n s , r e ad and wr i t e . c o m- ma nd w o r d s a r e us e d t o dist in g u ish r e ad op era t io n s f r o m wr i t e o p er a t io ns. t h e s e co mmand wo r d s a r e g i ven i n t a b l e 67. a ddr ess a u t o - i ncr e m e n t is p o ssib le in s p i m o d e . table 67. spi c o mman d w o rd s write read 90h (1001 0000 ) 91h (1001 0001 ) 0 1 r/w scl s d a frame 1 serial bus address byte frame 2 address pointer register byte ack. by adt7516/adt7517/adt7519 ack. by adt7516/adt7517/adt7519 stop by master start by master 0 0 1 a 2 a 1 a p 7 p6 p5 p4 p3 p2 p1 p0 9 1 9 1 02883-a - 059 f i g u re 60. i 2 c? w r iti n g t o the a ddr ess p o i n t e r regi st er to sele c t a r e gister f o r a subseque nt r e a d o p er atio n
adt7516/adt7517/adt7519 rev. a | page 40 of 44 frame 1 serial bus address byte frame 2 address pointer register byte ack. by adt7516/adt7517/adt7519 ack. by adt7516/adt7517/adt7519 ack. by adt7516/adt7517/adt7519 stop by master frame 3 data byte sda (continued) scl (continued) scl sd a start by master 1 0 0 1 a 2 a 1 a 0 p 7 p6 p5 p4 p3 p2 p1 p0 9 d7 d6 d 5 d4 d 3 d 2 d 1 d 0 r/w 1 9 1 9 1 02883-a - 060 f i g u re 61. i 2 c w r iti n g t o the a ddr ess p o i n t e r regi st er f o ll o w ed b y a si ngle b y t e o f d a ta to the s e l ect ed reg i st er 1 sda start by master stop by master no ack. by master ack. by adt7616/adt7517/adt7519 scl 9 0 0 1 a 2 a 1 a 0 r/w d7 d6 d5 d4 d3 d2 d1 d0 frame 1 serial bus address byte frame 2 single data byte from adt7516/adt7517/adt7519 1 9 1 02883-a - 061 f i g u re 62. i 2 creadi n g a singl e byt e o f d a ta f r om a sel ect e d re g i st e r write operati o n f i gur e 63 s h o w s t h e t i min g dia g ra m fo r a wr i t e o p era t ion t o t h e adt7516/ad t7517/adt7519. da t a is c l o c k e d in t o t h e r e g- is t e rs o n t h e r i sin g edg e o f scl k . w h en t h e cs lin e is hig h , t h e d i n an d d o u t li n e s a r e i n t h r e e-s t a t e mo de . onl y w h en t h e cs g o es f r o m a hig h t o a lo w do es th e p a r t accep t a n y da ta on t h e d i n li n e . i n s p i m o de , t h e addr es s p o i n t e r reg i s t er is c a p- a b le o f a u t o - i n c r e m e n t in g t o t h e n e xt r e g i st er i n t h e r e g i s t er ma p wi t h o u t ha vin g t o lo ad t h e addr es s p o in ter r e g i s t er e a ch t i me . i n f i gur e 63, t h e r e g i s t er addr es s p o r t io n g i v e s t h e f i rs t re g i ste r t h a t w i l l b e w r it te n to . sub s e q u e n t d a t a b y te s w i l l b e w r it te n i n to s e qu e n t i a l w r it abl e re g i ste r s . th u s , af te r e a ch d a t a b y te ha s b e e n w r i t te n i n to a re g i ste r , t h e a ddre s s p o i n te r re g i ste r a u t o - i n c r e m e n t s i t s val u e t o t h e n e xt a v a i l a b l e reg i s t er . th e addr es s p o in ter r e g i s t er wil l a u to-in c r e m e n t f r o m 00h t o 3fh a n d wil l lo o p bac k t o s t a r t a g ain a t 00h w h en i t r e ac h e s 3fh. read opera t i o n f i gur e 64 t o f i gur e 66 s h o w t h e timin g dia g ra ms n e ces s a r y t o acco m p lish co r r ec t r e ad o p er a t io n s . t o r e ad b a ck f r o m a r e g- is t e r , f i rs t wr i t e to t h e addr es s p o in t e r r e g i st er wi t h t h e addr ess o f th e r e g i s t er to be r e ad f r o m . this o p er a t io n is s h own in f i gur e 64. f i gur e 65 s h o w s t h e p r o c ed ur e f o r r e adin g bac k a sin g le b y t e o f da ta . th e r e ad comman d is f i rs t s e n t t o t h e p a r t d u r i n g t h e f i rs t eig h t clo c k c y cles. d u r i n g t h e fol l o w in g eig h t clo c k c y cles, t h e da t a con t ai n e d in t h e r e g i s t er s e le c t e d b y t h e addr es s p o in ter r e g i s t er is o u t p ut o n t o t h e d ou t lin e . d a t a is output on to t h e d ou t lin e on t h e fal l in g edg e o f sclk. f i gur e 6 6 s h o w s t h e p r o c e d ur e w h e n r e adin g da t a f r o m t w o s e q u en t i al r e g i s t ers. m u l t i p le da t a r e ads a r e p o s s i b le i n t h e s p i in t e r f ace m o de as t h e addr es s p o i n t e r r e g i s t er is a u t o -i ncr e m e n t al . th e addr es s p o in ter r e g i s t er wil l a u to-in c r e m e n t f r o m 00h t o 3fh a n d wil l lo o p bac k t o s t a r t a g ain a t 00h w h en i t r e ac h e s 3fh
adt7516/adt7517/adt7519 rev. a | page 41 of 44 d7 d6 d5 d4 d3 d2 d1 d6 d5 d4 d3 d2 d1 d0 d0 d7 1 8 1 8 cs sclk din stop d7 d6 d5 d4 d3 d2 d1 d0 1 8 cs (continued) sclk (continued) data byte register address write command din (continued) 02883-a - 062 start f i gure 63. spi wri t ing to the address p o i n t e r re gi st er f o ll o w e d b y a si ngle b y t e o f d a ta to the s e l ect ed reg i st er d7 din d6 d5 d4 d3 d2 d1 d6 d5 d4 d3 d2 d1 d0 d0 d7 s clk 1 8 1 8 cs stop 02883-a - 063 write command start register address f i gure 64. spi wri t ing to the address p o i n t e r re gi st er to se le ct a re gi ste r f o r a subse q uent re ad o p e r a t i o n d7 d6 d5 d4 d3 d2 d1 x x xx x x x d0 x cs sclk din dout 18 1 8 x xx x x x x d6 d5 d4 d3 d2 d1 d0 xd 7 stop 02883-a - 064 data byte 1 read command start f i g u re 65. spi r e ading a s i ng le b y t e of d a t a f r o m a s e l e c t ed r e g i s t e r
adt7516/adt7517/adt7519 rev. a | page 42 of 44 d7 d6 d5 d4 d3 d2 d1 x x x x x x x d0 x cs sclk din dout 1 8 1 8 x xx x x x x d6 d 5 d4 d3 d2 d1 d0 xd 7 cs (continued) sclk (continued) din (continued) dout (continued) stop x x x x x x x x 1 8 d7 d6 d5 d 4 d 3 d2 d1 d0 02883-a - 065 start read command data byte 1 data byte 2 f i g u re 66. spi r e ading t w o b y t e s of d a t a f r o m t w o s e q u ent i al r e g i s t e r s cs spi read operation write operation 02883-a - 066 f i gure 67. spi cor r ec t use of cs during spi communic at ion
adt7516/adt7517/adt7519 rev. a | page 43 of 44 smbus/spi in t/ int the ad t7516 /adt7517/ad t7519 int/ int out p ut s are an i n t e rr u p t lin e f o r d e vi ce s th a t wa n t t o tra d e th e i r a b ili t y t o mas t er f o r a n ex tra p i n. the adt7516/adt751 7/adt7519 a r e s l a v e de vi ces and us e t h e s m bu s/s p i i n t/ int t o sig n al th e h o s t d e v i ce tha t i t w a n t s t o tal k t o . th e s m b u s / s p i in t/ int on t h e adt7516/ad t7517/adt7519 is us ed as an o v er/un d er limi t indic a t o r . the in t/ int p i n h a s a n op en -dr a i n co nf igur a t ion t h a t a l lo ws t h e output s of s e ve r a l d e v i c e s t o b e w i re d - a n d to ge t h e r w h e n th e in t/ int p i n is ac ti v e lo w . u s e c6 o f th e c o n t rol c o nf ig- ura t io n 1 r e g i ster t o s e t the ac tiv e p o la r i ty o f the int/ int out - p u t. th e p o w e r - u p defa u l t is ac t i v e lo w . th e int/ int output ca n be dis a b l e d o r ena b le d b y s e t t in g c5 o f th e c o n t r o l c o nf ig- ura t io n 1 r e g i ster t o 1 o r 0, r e s p ec ti v e l y . the in t/ int o u t p ut b e com e s ac t i ve w h en e i t h er t h e in ter n al t e m p era t ur e val u e , t h e ext e r n al t e m p era t ur e val u e , v dd val u e , o r a n y o f t h e ai n i n p u t va l u es exce e d t h e va l u es i n t h eir co r r es- p o ndin g t hi gh /v hi g h or t lo w /v lo w r e g i s t ers. the int/ int out - p u t g o es inac t i ve a g a i n w h e n a co n v ersio n r e s u l t has t h e m e a- s u r e d val u e b a ck w i t h i n t h e t r i p limi ts a n d w h en t h e s t a t us r e g- ist e r ass o c i a t e d wi t h t h e o u t - o f - l imi t e v e n t is r e ad . t h e tw o i n t e rr u p t s t a t us r e gi s t e r s s h o w wh i c h ev en t ca used t h e in t/ int pi n to g o a c t i v e . the in t/ int o u t p u t r e q u ir es a n exter n al p u l l -u p r e sis t o r . this ca n b e conn e c t e d t o a v o l t a g e di f f er en t f r o m v dd , p r o v i d e d t h e max i m u m vol t age r a t i n g o f t h e int / int o u t p u t p i n is n o t exce e d e d . th e v a l u e o f t h e p u l l - u p r e sis t o r dep e n d s on t h e a p plic a t ion b u t s h o u ld b e la rg e en o u g h t o a v o i d exces s i v e sink c u r r en ts a t t h e i n t/ int o u t p u t , whic h can h e a t the c h i p an d a f fe c t t h e t e m p e r a t ur e r e adin g . smbus alert respons e the in t/ int p i n b e ha ves t h e s a m e wa y as an s m bus a l er t p i n w h en t h e s m bus/i 2 c in t e rfa c e is se lect e d . i t i s a n o p en - d ra i n o u t p ut an d r e q u ir es a p u l l -u p t o v dd . s e v e r a l i n t / int output s ca n be wir e -and t o g e th er , s o tha t t h e co mmon lin e wil l g o lo w i f one or more o f t h e i n t / int o u t p u t s g o es lo w . the p o la r i ty o f th e in t/ int p i n m u s t be s e t ac ti ve lo w f o r a n u m b er o f o u t p u t s to b e w i re d- a n d to ge t h e r . the in t/ int output c a n op e r ate a s an sm b a l e r t fu n c ti o n . s l a v e de vices on t h e s m b u s c a n n o t n o r m al l y sig n al t o t h e m a s t e r tha t t h ey w a n t t o talk , b u t th e sm b a l e r t fu n c ti o n al lo ws th em t o do s o . sm b a l e r t is us ed in co n j u n c tion wi t h t h e s m bus g e n e ral cal l addr es s. on e o r m o r e i n t/ int o u t p u t s can be co nnec t e d t o a co mm on sm b a l e r t lin e conn e c t e d t o t h e mas t er . w h en t h e sm b a l e r t lin e is p u l l ed lo w b y o n e o f t h e de vices, t h e f o l l o w in g p r o c e d ur e o c c u rs as sh o w n in f i gur e 68. 1. sm b a l e r t p u l l e d lo w . 2. m a st er ini t i a t e s a r e ad o p er a t ion an d s e n d s t h e aler t r e s- p o n s e addr es s ( a ra = 0001 10 0). this is a g e neral cal l addr ess t h a t m u st n o t b e us e d a s a sp e c if ic de vi ce addr ess. 3. the de v i ces w h os e int/ int o u t p u t is lo w r e s p o n ds t o th e aler t r e s p o n s e addr es s and t h e mas t er r e ads i t s de vice addr ess. a s t h e de vice a ddr ess i s s e ve n b i ts lo ng, a n lsb o f 1 is adde d . t h e addr ess o f t h e d e v i ce is n o w k n o w n and i t ca n be in t e r r oga t ed in t h e us ual wa y . 4. i f m o r e than one de vice s i n t/ int o u t p u t is lo w , the o n e wi t h t h e lo w e s t de vice addr es s wil l ha v e p r io r i ty in acco r - dan c e w i t h n o r m a l s m bus sp e c if ica t ion s . 5. on ce t h e ad t7 516/adt7517/adt7519 ha v e r e s p o n ded t o t h e aler t r e s p o n s e addr es s, t h e y wi l l r e s e t t h e i r int/ int o u t p u t , p r o v i d e d th a t t h e co n d i t i o n th a t ca used th e o u t- o f - limi t e v e n t n o lo n g er exis ts an d t h a t t h e s t a t us r e g i s t er a s soci a t e d wi th th e o u t - o f - l im i t ev e n t i s r e a d . i f th e sm b a l e r t lin e r e ma in s lo w , the mast er wi l l s e nd t h e ara a g ain. i t wil l co n t in ue t o do this un til al l devices wh os e sm b a l e r t output s we re l o w h a ve re sp o n d e d. maste r receives smbalert start alert response address rd ack device address master sends ara and read command device sends its address no ack stop 02883-a - 067 f i g u re 68. int / int re sp o n ds to smb a lert ar a master receives smbalert start alert response address rd ack device address master sends ara and read command device sends its address device ack ack pec no ack stop maste r ack maste r nack device sends its pec data 02883- a- 068 f i g u re 69. int / int re sp o n ds to smb a lert ar a with p a ck et e r r o r c h eck ing (pe c )
adt7516/adt7517/adt7519 rev. a | page 44 of 44 outline dimensions 16 9 8 1 pin 1 sea t i n g pl a n e 0. 0 1 0 0. 0 0 4 0. 012 0. 008 0. 025 bs c 0. 01 0 0. 00 6 0. 050 0. 016 8 0 coplanarity 0.004 0. 065 0. 049 0. 069 0. 053 0. 154 bs c 0. 236 bs c compliant to jedec standards mo-137ab 0 . 193 bs c f i gure 70. 1 6 -l ead shrink sm al l o u t lin e p a ckage [qs o p ] (r q - 16) d i mensions in in ch es ordering guide model temperature r a nge dac re solution package descri ption minimum quantities/ree l adt7519arq C40c to +120c 8 bits 16-lead qsop n/a adt7519arq-r eel C40c to +120c 8 bits 16-lead qsop 2500 adt7519arq-r eel7 C40c to +120c 8 bits 16-lead qsop 1000 adt7519arqz 1 C40c to +120c 8 bits 16-lead qsop n/a adt7519arqz 1 -reel C40c to +120c 8 bits 16-lead qsop 2500 adt7519arqz 1 -reel7 C40c to +120c 8 bits 16-lead qsop 1000 adt7517arq C40c to +120c 10 bits 16-lead qsop n/a adt7517arq-r eel C40c to +120c 10 bits 16-lead qsop 2500 adt7517arq-r eel7 C40c to +120c 10 bits 16-lead qsop 1000 adt7516arq C40c to +120c 12 bits 16-lead qsop n/a adt7516arq-r eel C40c to +120c 12 bits 16-lead qsop 2500 adt7516arq-r eel7 C40c to +120c 12 bits 16-lead qsop 1000 1 z = pb-free part. purchase o f licensed i 2 c co mponents of analog devices or one of its sublicensed associated companies c o nveys a lic e nse f o r the p u r c ha ser und e r the phi lips i 2 c pa tent rig h ts to us e these c o mponent s in a n i 2 c system, pr ovid ed tha t the s y stem c o nf or ms to the i 2 c sta n da rd specif ica t ion a s de f i ned by philips. ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . c02883-0-8/04(a)

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